1 /* irq.h: IRQ registers on the 64-bit Sparc. 2 * 3 * Copyright (C) 1996 David S. Miller (davem@davemloft.net) 4 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) 5 */ 6 7 #ifndef _SPARC64_IRQ_H 8 #define _SPARC64_IRQ_H 9 10 #include <linux/linkage.h> 11 #include <linux/kernel.h> 12 #include <linux/errno.h> 13 #include <linux/interrupt.h> 14 #include <asm/pil.h> 15 #include <asm/ptrace.h> 16 17 /* IMAP/ICLR register defines */ 18 #define IMAP_VALID 0x80000000UL /* IRQ Enabled */ 19 #define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */ 20 #define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */ 21 #define IMAP_TID_SHIFT 26 22 #define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */ 23 #define IMAP_AID_SHIFT 26 24 #define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */ 25 #define IMAP_NID_SHIFT 21 26 #define IMAP_IGN 0x000007c0UL /* IRQ Group Number */ 27 #define IMAP_INO 0x0000003fUL /* IRQ Number */ 28 #define IMAP_INR 0x000007ffUL /* Full interrupt number*/ 29 30 #define ICLR_IDLE 0x00000000UL /* Idle state */ 31 #define ICLR_TRANSMIT 0x00000001UL /* Transmit state */ 32 #define ICLR_PENDING 0x00000003UL /* Pending state */ 33 34 /* The largest number of unique interrupt sources we support. 35 * If this needs to ever be larger than 255, you need to change 36 * the type of ino_bucket->virt_irq as appropriate. 37 * 38 * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq(). 39 */ 40 #define NR_IRQS 255 41 42 extern void irq_install_pre_handler(int virt_irq, 43 void (*func)(unsigned int, void *, void *), 44 void *arg1, void *arg2); 45 #define irq_canonicalize(irq) (irq) 46 extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); 47 extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); 48 extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino); 49 extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p, 50 unsigned int msi_devino_start, 51 unsigned int msi_devino_end); 52 extern void sun4v_destroy_msi(unsigned int virt_irq); 53 extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p, 54 unsigned int msi_devino_start, 55 unsigned int msi_devino_end, 56 unsigned long imap_base, 57 unsigned long iclr_base); 58 extern void sun4u_destroy_msi(unsigned int virt_irq); 59 extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); 60 61 extern unsigned char virt_irq_alloc(unsigned int dev_handle, 62 unsigned int dev_ino); 63 #ifdef CONFIG_PCI_MSI 64 extern void virt_irq_free(unsigned int virt_irq); 65 #endif 66 67 extern void __init init_IRQ(void); 68 extern void fixup_irqs(void); 69 70 static inline void set_softint(unsigned long bits) 71 { 72 __asm__ __volatile__("wr %0, 0x0, %%set_softint" 73 : /* No outputs */ 74 : "r" (bits)); 75 } 76 77 static inline void clear_softint(unsigned long bits) 78 { 79 __asm__ __volatile__("wr %0, 0x0, %%clear_softint" 80 : /* No outputs */ 81 : "r" (bits)); 82 } 83 84 static inline unsigned long get_softint(void) 85 { 86 unsigned long retval; 87 88 __asm__ __volatile__("rd %%softint, %0" 89 : "=r" (retval)); 90 return retval; 91 } 92 93 void __trigger_all_cpu_backtrace(void); 94 #define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace() 95 96 extern void *hardirq_stack[NR_CPUS]; 97 extern void *softirq_stack[NR_CPUS]; 98 #define __ARCH_HAS_DO_SOFTIRQ 99 100 #endif 101