xref: /openbmc/linux/arch/sparc/include/asm/head_64.h (revision d7a3d85e)
1 #ifndef _SPARC64_HEAD_H
2 #define _SPARC64_HEAD_H
3 
4 #include <asm/pstate.h>
5 
6 	/* wrpr	%g0, val, %gl */
7 #define SET_GL(val)	\
8 	.word	0xa1902000 | val
9 
10 	/* rdpr %gl, %gN */
11 #define GET_GL_GLOBAL(N)	\
12 	.word	0x81540000 | (N << 25)
13 
14 #define KERNBASE	0x400000
15 
16 #define	PTREGS_OFF	(STACK_BIAS + STACKFRAME_SZ)
17 
18 #define __CHEETAH_ID	0x003e0014
19 #define __JALAPENO_ID	0x003e0016
20 #define __SERRANO_ID	0x003e0022
21 
22 #define CHEETAH_MANUF		0x003e
23 #define CHEETAH_IMPL		0x0014 /* Ultra-III   */
24 #define CHEETAH_PLUS_IMPL	0x0015 /* Ultra-III+  */
25 #define JALAPENO_IMPL		0x0016 /* Ultra-IIIi  */
26 #define JAGUAR_IMPL		0x0018 /* Ultra-IV    */
27 #define PANTHER_IMPL		0x0019 /* Ultra-IV+   */
28 #define SERRANO_IMPL		0x0022 /* Ultra-IIIi+ */
29 
30 #define BRANCH_IF_SUN4V(tmp1,label)		\
31 	sethi	%hi(is_sun4v), %tmp1;		\
32 	lduw	[%tmp1 + %lo(is_sun4v)], %tmp1; \
33 	brnz,pn	%tmp1, label;			\
34 	 nop
35 
36 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label)	\
37 	rdpr	%ver, %tmp1;			\
38 	sethi	%hi(__CHEETAH_ID), %tmp2;	\
39 	srlx	%tmp1, 32, %tmp1;		\
40 	or	%tmp2, %lo(__CHEETAH_ID), %tmp2;\
41 	cmp	%tmp1, %tmp2;			\
42 	be,pn	%icc, label;			\
43 	 nop;
44 
45 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label)	\
46 	rdpr	%ver, %tmp1;			\
47 	sethi	%hi(__JALAPENO_ID), %tmp2;	\
48 	srlx	%tmp1, 32, %tmp1;		\
49 	or	%tmp2, %lo(__JALAPENO_ID), %tmp2;\
50 	cmp	%tmp1, %tmp2;			\
51 	be,pn	%icc, label;			\
52 	 nop;
53 
54 #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label)	\
55 	rdpr	%ver, %tmp1;			\
56 	srlx	%tmp1, (32 + 16), %tmp2;	\
57 	cmp	%tmp2, CHEETAH_MANUF;		\
58 	bne,pt	%xcc, 99f;			\
59 	 sllx	%tmp1, 16, %tmp1;		\
60 	srlx	%tmp1, (32 + 16), %tmp2;	\
61 	cmp	%tmp2, CHEETAH_PLUS_IMPL;	\
62 	bgeu,pt	%xcc, label;			\
63 99:	 nop;
64 
65 #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label)	\
66 	rdpr	%ver, %tmp1;			\
67 	srlx	%tmp1, (32 + 16), %tmp2;	\
68 	cmp	%tmp2, CHEETAH_MANUF;		\
69 	bne,pt	%xcc, 99f;			\
70 	 sllx	%tmp1, 16, %tmp1;		\
71 	srlx	%tmp1, (32 + 16), %tmp2;	\
72 	cmp	%tmp2, CHEETAH_IMPL;		\
73 	bgeu,pt	%xcc, label;			\
74 99:	 nop;
75 
76 #endif /* !(_SPARC64_HEAD_H) */
77