xref: /openbmc/linux/arch/sparc/include/asm/floppy_64.h (revision 263291fa)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2a439fe51SSam Ravnborg /* floppy.h: Sparc specific parts of the Floppy driver.
3a439fe51SSam Ravnborg  *
410a104f9SDavid S. Miller  * Copyright (C) 1996, 2007, 2008 David S. Miller (davem@davemloft.net)
5a439fe51SSam Ravnborg  * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6a439fe51SSam Ravnborg  *
7a439fe51SSam Ravnborg  * Ultra/PCI support added: Sep 1997  Eddie C. Dost  (ecd@skynet.be)
8a439fe51SSam Ravnborg  */
9a439fe51SSam Ravnborg 
10a439fe51SSam Ravnborg #ifndef __ASM_SPARC64_FLOPPY_H
11a439fe51SSam Ravnborg #define __ASM_SPARC64_FLOPPY_H
12a439fe51SSam Ravnborg 
1310a104f9SDavid S. Miller #include <linux/of.h>
14*263291faSRob Herring #include <linux/of_platform.h>
153ae627a1SDavid S. Miller #include <linux/dma-mapping.h>
16a439fe51SSam Ravnborg 
17a439fe51SSam Ravnborg #include <asm/auxio.h>
18a439fe51SSam Ravnborg 
19a439fe51SSam Ravnborg /*
20a439fe51SSam Ravnborg  * Define this to enable exchanging drive 0 and 1 if only drive 1 is
21a439fe51SSam Ravnborg  * probed on PCI machines.
22a439fe51SSam Ravnborg  */
23a439fe51SSam Ravnborg #undef PCI_FDC_SWAP_DRIVES
24a439fe51SSam Ravnborg 
25a439fe51SSam Ravnborg 
26a439fe51SSam Ravnborg /* References:
27a439fe51SSam Ravnborg  * 1) Netbsd Sun floppy driver.
28a439fe51SSam Ravnborg  * 2) NCR 82077 controller manual
29a439fe51SSam Ravnborg  * 3) Intel 82077 controller manual
30a439fe51SSam Ravnborg  */
31a439fe51SSam Ravnborg struct sun_flpy_controller {
32a439fe51SSam Ravnborg 	volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */
33a439fe51SSam Ravnborg 	volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */
34a439fe51SSam Ravnborg 	volatile unsigned char dor_82077;     /* Digital Output reg. */
35a439fe51SSam Ravnborg 	volatile unsigned char tapectl_82077; /* Tape Control reg */
36a439fe51SSam Ravnborg 	volatile unsigned char status_82077;  /* Main Status Register. */
37a439fe51SSam Ravnborg #define drs_82077              status_82077   /* Digital Rate Select reg. */
38a439fe51SSam Ravnborg 	volatile unsigned char data_82077;    /* Data fifo. */
39a439fe51SSam Ravnborg 	volatile unsigned char ___unused;
40a439fe51SSam Ravnborg 	volatile unsigned char dir_82077;     /* Digital Input reg. */
41a439fe51SSam Ravnborg #define dcr_82077              dir_82077      /* Config Control reg. */
42a439fe51SSam Ravnborg };
43a439fe51SSam Ravnborg 
44a439fe51SSam Ravnborg /* You'll only ever find one controller on an Ultra anyways. */
45a439fe51SSam Ravnborg static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1;
46a439fe51SSam Ravnborg unsigned long fdc_status;
4794a0cb1fSGrant Likely static struct platform_device *floppy_op = NULL;
48a439fe51SSam Ravnborg 
49a439fe51SSam Ravnborg struct sun_floppy_ops {
506cb7e696SWilly Tarreau 	unsigned char	(*fd_inb) (unsigned long port, unsigned int reg);
516cb7e696SWilly Tarreau 	void		(*fd_outb) (unsigned char value, unsigned long base,
526cb7e696SWilly Tarreau 				    unsigned int reg);
53a439fe51SSam Ravnborg 	void		(*fd_enable_dma) (void);
54a439fe51SSam Ravnborg 	void		(*fd_disable_dma) (void);
55a439fe51SSam Ravnborg 	void		(*fd_set_dma_mode) (int);
56a439fe51SSam Ravnborg 	void		(*fd_set_dma_addr) (char *);
57a439fe51SSam Ravnborg 	void		(*fd_set_dma_count) (int);
58a439fe51SSam Ravnborg 	unsigned int	(*get_dma_residue) (void);
59a439fe51SSam Ravnborg 	int		(*fd_request_irq) (void);
60a439fe51SSam Ravnborg 	void		(*fd_free_irq) (void);
61a439fe51SSam Ravnborg 	int		(*fd_eject) (int);
62a439fe51SSam Ravnborg };
63a439fe51SSam Ravnborg 
64a439fe51SSam Ravnborg static struct sun_floppy_ops sun_fdops;
65a439fe51SSam Ravnborg 
666cb7e696SWilly Tarreau #define fd_inb(base, reg)         sun_fdops.fd_inb(base, reg)
676cb7e696SWilly Tarreau #define fd_outb(value, base, reg) sun_fdops.fd_outb(value, base, reg)
68a439fe51SSam Ravnborg #define fd_enable_dma()           sun_fdops.fd_enable_dma()
69a439fe51SSam Ravnborg #define fd_disable_dma()          sun_fdops.fd_disable_dma()
70a439fe51SSam Ravnborg #define fd_request_dma()          (0) /* nothing... */
71a439fe51SSam Ravnborg #define fd_free_dma()             /* nothing... */
72a439fe51SSam Ravnborg #define fd_clear_dma_ff()         /* nothing... */
73a439fe51SSam Ravnborg #define fd_set_dma_mode(mode)     sun_fdops.fd_set_dma_mode(mode)
74a439fe51SSam Ravnborg #define fd_set_dma_addr(addr)     sun_fdops.fd_set_dma_addr(addr)
75a439fe51SSam Ravnborg #define fd_set_dma_count(count)   sun_fdops.fd_set_dma_count(count)
76a439fe51SSam Ravnborg #define get_dma_residue(x)        sun_fdops.get_dma_residue()
77a439fe51SSam Ravnborg #define fd_request_irq()          sun_fdops.fd_request_irq()
78a439fe51SSam Ravnborg #define fd_free_irq()             sun_fdops.fd_free_irq()
79a439fe51SSam Ravnborg #define fd_eject(drive)           sun_fdops.fd_eject(drive)
80a439fe51SSam Ravnborg 
81a439fe51SSam Ravnborg /* Super paranoid... */
82a439fe51SSam Ravnborg #undef HAVE_DISABLE_HLT
83a439fe51SSam Ravnborg 
84a439fe51SSam Ravnborg static int sun_floppy_types[2] = { 0, 0 };
85a439fe51SSam Ravnborg 
86a439fe51SSam Ravnborg /* Here is where we catch the floppy driver trying to initialize,
87a439fe51SSam Ravnborg  * therefore this is where we call the PROM device tree probing
88a439fe51SSam Ravnborg  * routine etc. on the Sparc.
89a439fe51SSam Ravnborg  */
90a439fe51SSam Ravnborg #define FLOPPY0_TYPE		sun_floppy_init()
91a439fe51SSam Ravnborg #define FLOPPY1_TYPE		sun_floppy_types[1]
92a439fe51SSam Ravnborg 
93a439fe51SSam Ravnborg #define FDC1			((unsigned long)sun_fdc)
94a439fe51SSam Ravnborg 
95a439fe51SSam Ravnborg #define N_FDC    1
96a439fe51SSam Ravnborg #define N_DRIVE  8
97a439fe51SSam Ravnborg 
98a439fe51SSam Ravnborg /* No 64k boundary crossing problems on the Sparc. */
99a439fe51SSam Ravnborg #define CROSS_64KB(a,s) (0)
100a439fe51SSam Ravnborg 
sun_82077_fd_inb(unsigned long base,unsigned int reg)1016cb7e696SWilly Tarreau static unsigned char sun_82077_fd_inb(unsigned long base, unsigned int reg)
102a439fe51SSam Ravnborg {
103a439fe51SSam Ravnborg 	udelay(5);
1046cb7e696SWilly Tarreau 	switch (reg) {
105a439fe51SSam Ravnborg 	default:
1066cb7e696SWilly Tarreau 		printk("floppy: Asked to read unknown port %x\n", reg);
107a439fe51SSam Ravnborg 		panic("floppy: Port bolixed.");
1086cb7e696SWilly Tarreau 	case FD_STATUS:
109a439fe51SSam Ravnborg 		return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA;
1106cb7e696SWilly Tarreau 	case FD_DATA:
111a439fe51SSam Ravnborg 		return sbus_readb(&sun_fdc->data_82077);
1126cb7e696SWilly Tarreau 	case FD_DIR:
113a439fe51SSam Ravnborg 		/* XXX: Is DCL on 0x80 in sun4m? */
114a439fe51SSam Ravnborg 		return sbus_readb(&sun_fdc->dir_82077);
1156cb79b3fSJoe Perches 	}
116a439fe51SSam Ravnborg 	panic("sun_82072_fd_inb: How did I get here?");
117a439fe51SSam Ravnborg }
118a439fe51SSam Ravnborg 
sun_82077_fd_outb(unsigned char value,unsigned long base,unsigned int reg)1196cb7e696SWilly Tarreau static void sun_82077_fd_outb(unsigned char value, unsigned long base,
1206cb7e696SWilly Tarreau 			      unsigned int reg)
121a439fe51SSam Ravnborg {
122a439fe51SSam Ravnborg 	udelay(5);
1236cb7e696SWilly Tarreau 	switch (reg) {
124a439fe51SSam Ravnborg 	default:
1256cb7e696SWilly Tarreau 		printk("floppy: Asked to write to unknown port %x\n", reg);
126a439fe51SSam Ravnborg 		panic("floppy: Port bolixed.");
1276cb7e696SWilly Tarreau 	case FD_DOR:
128a439fe51SSam Ravnborg 		/* Happily, the 82077 has a real DOR register. */
129a439fe51SSam Ravnborg 		sbus_writeb(value, &sun_fdc->dor_82077);
130a439fe51SSam Ravnborg 		break;
1316cb7e696SWilly Tarreau 	case FD_DATA:
132a439fe51SSam Ravnborg 		sbus_writeb(value, &sun_fdc->data_82077);
133a439fe51SSam Ravnborg 		break;
1346cb7e696SWilly Tarreau 	case FD_DCR:
135a439fe51SSam Ravnborg 		sbus_writeb(value, &sun_fdc->dcr_82077);
136a439fe51SSam Ravnborg 		break;
1376cb7e696SWilly Tarreau 	case FD_DSR:
138a439fe51SSam Ravnborg 		sbus_writeb(value, &sun_fdc->status_82077);
139a439fe51SSam Ravnborg 		break;
1406cb79b3fSJoe Perches 	}
141a439fe51SSam Ravnborg 	return;
142a439fe51SSam Ravnborg }
143a439fe51SSam Ravnborg 
144a439fe51SSam Ravnborg /* For pseudo-dma (Sun floppy drives have no real DMA available to
145a439fe51SSam Ravnborg  * them so we must eat the data fifo bytes directly ourselves) we have
146a439fe51SSam Ravnborg  * three state variables.  doing_pdma tells our inline low-level
147a439fe51SSam Ravnborg  * assembly floppy interrupt entry point whether it should sit and eat
148a439fe51SSam Ravnborg  * bytes from the fifo or just transfer control up to the higher level
149a439fe51SSam Ravnborg  * floppy interrupt c-code.  I tried very hard but I could not get the
150a439fe51SSam Ravnborg  * pseudo-dma to work in c-code without getting many overruns and
151a439fe51SSam Ravnborg  * underruns.  If non-zero, doing_pdma encodes the direction of
152a439fe51SSam Ravnborg  * the transfer for debugging.  1=read 2=write
153a439fe51SSam Ravnborg  */
154a439fe51SSam Ravnborg unsigned char *pdma_vaddr;
155a439fe51SSam Ravnborg unsigned long pdma_size;
156a439fe51SSam Ravnborg volatile int doing_pdma = 0;
157a439fe51SSam Ravnborg 
158a439fe51SSam Ravnborg /* This is software state */
159a439fe51SSam Ravnborg char *pdma_base = NULL;
160a439fe51SSam Ravnborg unsigned long pdma_areasize;
161a439fe51SSam Ravnborg 
162a439fe51SSam Ravnborg /* Common routines to all controller types on the Sparc. */
sun_fd_disable_dma(void)163a439fe51SSam Ravnborg static void sun_fd_disable_dma(void)
164a439fe51SSam Ravnborg {
165a439fe51SSam Ravnborg 	doing_pdma = 0;
166a439fe51SSam Ravnborg 	pdma_base = NULL;
167a439fe51SSam Ravnborg }
168a439fe51SSam Ravnborg 
sun_fd_set_dma_mode(int mode)169a439fe51SSam Ravnborg static void sun_fd_set_dma_mode(int mode)
170a439fe51SSam Ravnborg {
171a439fe51SSam Ravnborg 	switch(mode) {
172a439fe51SSam Ravnborg 	case DMA_MODE_READ:
173a439fe51SSam Ravnborg 		doing_pdma = 1;
174a439fe51SSam Ravnborg 		break;
175a439fe51SSam Ravnborg 	case DMA_MODE_WRITE:
176a439fe51SSam Ravnborg 		doing_pdma = 2;
177a439fe51SSam Ravnborg 		break;
178a439fe51SSam Ravnborg 	default:
179a439fe51SSam Ravnborg 		printk("Unknown dma mode %d\n", mode);
180a439fe51SSam Ravnborg 		panic("floppy: Giving up...");
181a439fe51SSam Ravnborg 	}
182a439fe51SSam Ravnborg }
183a439fe51SSam Ravnborg 
sun_fd_set_dma_addr(char * buffer)184a439fe51SSam Ravnborg static void sun_fd_set_dma_addr(char *buffer)
185a439fe51SSam Ravnborg {
186a439fe51SSam Ravnborg 	pdma_vaddr = buffer;
187a439fe51SSam Ravnborg }
188a439fe51SSam Ravnborg 
sun_fd_set_dma_count(int length)189a439fe51SSam Ravnborg static void sun_fd_set_dma_count(int length)
190a439fe51SSam Ravnborg {
191a439fe51SSam Ravnborg 	pdma_size = length;
192a439fe51SSam Ravnborg }
193a439fe51SSam Ravnborg 
sun_fd_enable_dma(void)194a439fe51SSam Ravnborg static void sun_fd_enable_dma(void)
195a439fe51SSam Ravnborg {
196a439fe51SSam Ravnborg 	pdma_base = pdma_vaddr;
197a439fe51SSam Ravnborg 	pdma_areasize = pdma_size;
198a439fe51SSam Ravnborg }
199a439fe51SSam Ravnborg 
sparc_floppy_irq(int irq,void * dev_cookie)200a439fe51SSam Ravnborg irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie)
201a439fe51SSam Ravnborg {
202a439fe51SSam Ravnborg 	if (likely(doing_pdma)) {
203a439fe51SSam Ravnborg 		void __iomem *stat = (void __iomem *) fdc_status;
204a439fe51SSam Ravnborg 		unsigned char *vaddr = pdma_vaddr;
205a439fe51SSam Ravnborg 		unsigned long size = pdma_size;
206a439fe51SSam Ravnborg 		u8 val;
207a439fe51SSam Ravnborg 
208a439fe51SSam Ravnborg 		while (size) {
209a439fe51SSam Ravnborg 			val = readb(stat);
210a439fe51SSam Ravnborg 			if (unlikely(!(val & 0x80))) {
211a439fe51SSam Ravnborg 				pdma_vaddr = vaddr;
212a439fe51SSam Ravnborg 				pdma_size = size;
213a439fe51SSam Ravnborg 				return IRQ_HANDLED;
214a439fe51SSam Ravnborg 			}
215a439fe51SSam Ravnborg 			if (unlikely(!(val & 0x20))) {
216a439fe51SSam Ravnborg 				pdma_vaddr = vaddr;
217a439fe51SSam Ravnborg 				pdma_size = size;
218a439fe51SSam Ravnborg 				doing_pdma = 0;
219a439fe51SSam Ravnborg 				goto main_interrupt;
220a439fe51SSam Ravnborg 			}
221a439fe51SSam Ravnborg 			if (val & 0x40) {
222a439fe51SSam Ravnborg 				/* read */
223a439fe51SSam Ravnborg 				*vaddr++ = readb(stat + 1);
224a439fe51SSam Ravnborg 			} else {
225a439fe51SSam Ravnborg 				unsigned char data = *vaddr++;
226a439fe51SSam Ravnborg 
227a439fe51SSam Ravnborg 				/* write */
228a439fe51SSam Ravnborg 				writeb(data, stat + 1);
229a439fe51SSam Ravnborg 			}
230a439fe51SSam Ravnborg 			size--;
231a439fe51SSam Ravnborg 		}
232a439fe51SSam Ravnborg 
233a439fe51SSam Ravnborg 		pdma_vaddr = vaddr;
234a439fe51SSam Ravnborg 		pdma_size = size;
235a439fe51SSam Ravnborg 
236a439fe51SSam Ravnborg 		/* Send Terminal Count pulse to floppy controller. */
237a439fe51SSam Ravnborg 		val = readb(auxio_register);
238a439fe51SSam Ravnborg 		val |= AUXIO_AUX1_FTCNT;
239a439fe51SSam Ravnborg 		writeb(val, auxio_register);
240a439fe51SSam Ravnborg 		val &= ~AUXIO_AUX1_FTCNT;
241a439fe51SSam Ravnborg 		writeb(val, auxio_register);
242a439fe51SSam Ravnborg 
243a439fe51SSam Ravnborg 		doing_pdma = 0;
244a439fe51SSam Ravnborg 	}
245a439fe51SSam Ravnborg 
246a439fe51SSam Ravnborg main_interrupt:
247a439fe51SSam Ravnborg 	return floppy_interrupt(irq, dev_cookie);
248a439fe51SSam Ravnborg }
249a439fe51SSam Ravnborg 
sun_fd_request_irq(void)250a439fe51SSam Ravnborg static int sun_fd_request_irq(void)
251a439fe51SSam Ravnborg {
252a439fe51SSam Ravnborg 	static int once = 0;
253a439fe51SSam Ravnborg 	int error;
254a439fe51SSam Ravnborg 
255a439fe51SSam Ravnborg 	if(!once) {
256a439fe51SSam Ravnborg 		once = 1;
257a439fe51SSam Ravnborg 
258a439fe51SSam Ravnborg 		error = request_irq(FLOPPY_IRQ, sparc_floppy_irq,
259d2f09b1cSMichael Opdenacker 				    0, "floppy", NULL);
260a439fe51SSam Ravnborg 
261a439fe51SSam Ravnborg 		return ((error == 0) ? 0 : -1);
262a439fe51SSam Ravnborg 	}
263a439fe51SSam Ravnborg 	return 0;
264a439fe51SSam Ravnborg }
265a439fe51SSam Ravnborg 
sun_fd_free_irq(void)266a439fe51SSam Ravnborg static void sun_fd_free_irq(void)
267a439fe51SSam Ravnborg {
268a439fe51SSam Ravnborg }
269a439fe51SSam Ravnborg 
sun_get_dma_residue(void)270a439fe51SSam Ravnborg static unsigned int sun_get_dma_residue(void)
271a439fe51SSam Ravnborg {
272a439fe51SSam Ravnborg 	/* XXX This isn't really correct. XXX */
273a439fe51SSam Ravnborg 	return 0;
274a439fe51SSam Ravnborg }
275a439fe51SSam Ravnborg 
sun_fd_eject(int drive)276a439fe51SSam Ravnborg static int sun_fd_eject(int drive)
277a439fe51SSam Ravnborg {
278a439fe51SSam Ravnborg 	set_dor(0x00, 0xff, 0x90);
279a439fe51SSam Ravnborg 	udelay(500);
280a439fe51SSam Ravnborg 	set_dor(0x00, 0x6f, 0x00);
281a439fe51SSam Ravnborg 	udelay(500);
282a439fe51SSam Ravnborg 	return 0;
283a439fe51SSam Ravnborg }
284a439fe51SSam Ravnborg 
285aae7fb87SDavid S. Miller #include <asm/ebus_dma.h>
286a439fe51SSam Ravnborg #include <asm/ns87303.h>
287a439fe51SSam Ravnborg 
288a439fe51SSam Ravnborg static struct ebus_dma_info sun_pci_fd_ebus_dma;
2893ae627a1SDavid S. Miller static struct device *sun_floppy_dev;
290a439fe51SSam Ravnborg static int sun_pci_broken_drive = -1;
291a439fe51SSam Ravnborg 
292a439fe51SSam Ravnborg struct sun_pci_dma_op {
293a439fe51SSam Ravnborg 	unsigned int 	addr;
294a439fe51SSam Ravnborg 	int		len;
295a439fe51SSam Ravnborg 	int		direction;
296a439fe51SSam Ravnborg 	char		*buf;
297a439fe51SSam Ravnborg };
298a439fe51SSam Ravnborg static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL};
299a439fe51SSam Ravnborg static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL};
300a439fe51SSam Ravnborg 
301f05a6865SSam Ravnborg irqreturn_t floppy_interrupt(int irq, void *dev_id);
302a439fe51SSam Ravnborg 
sun_pci_fd_inb(unsigned long base,unsigned int reg)3036cb7e696SWilly Tarreau static unsigned char sun_pci_fd_inb(unsigned long base, unsigned int reg)
304a439fe51SSam Ravnborg {
305a439fe51SSam Ravnborg 	udelay(5);
3066cb7e696SWilly Tarreau 	return inb(base + reg);
307a439fe51SSam Ravnborg }
308a439fe51SSam Ravnborg 
sun_pci_fd_outb(unsigned char val,unsigned long base,unsigned int reg)3096cb7e696SWilly Tarreau static void sun_pci_fd_outb(unsigned char val, unsigned long base,
3106cb7e696SWilly Tarreau 			    unsigned int reg)
311a439fe51SSam Ravnborg {
312a439fe51SSam Ravnborg 	udelay(5);
3136cb7e696SWilly Tarreau 	outb(val, base + reg);
314a439fe51SSam Ravnborg }
315a439fe51SSam Ravnborg 
sun_pci_fd_broken_outb(unsigned char val,unsigned long base,unsigned int reg)3166cb7e696SWilly Tarreau static void sun_pci_fd_broken_outb(unsigned char val, unsigned long base,
3176cb7e696SWilly Tarreau 				   unsigned int reg)
318a439fe51SSam Ravnborg {
319a439fe51SSam Ravnborg 	udelay(5);
320a439fe51SSam Ravnborg 	/*
321a439fe51SSam Ravnborg 	 * XXX: Due to SUN's broken floppy connector on AX and AXi
322a439fe51SSam Ravnborg 	 *      we need to turn on MOTOR_0 also, if the floppy is
323a439fe51SSam Ravnborg 	 *      jumpered to DS1 (like most PC floppies are). I hope
324a439fe51SSam Ravnborg 	 *      this does not hurt correct hardware like the AXmp.
325a439fe51SSam Ravnborg 	 *      (Eddie, Sep 12 1998).
326a439fe51SSam Ravnborg 	 */
3276cb7e696SWilly Tarreau 	if (reg == FD_DOR) {
328a439fe51SSam Ravnborg 		if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) {
329a439fe51SSam Ravnborg 			val |= 0x10;
330a439fe51SSam Ravnborg 		}
331a439fe51SSam Ravnborg 	}
3326cb7e696SWilly Tarreau 	outb(val, base + reg);
333a439fe51SSam Ravnborg }
334a439fe51SSam Ravnborg 
335a439fe51SSam Ravnborg #ifdef PCI_FDC_SWAP_DRIVES
sun_pci_fd_lde_broken_outb(unsigned char val,unsigned long base,unsigned int reg)3366cb7e696SWilly Tarreau static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long base,
3376cb7e696SWilly Tarreau 				       unsigned int reg)
338a439fe51SSam Ravnborg {
339a439fe51SSam Ravnborg 	udelay(5);
340a439fe51SSam Ravnborg 	/*
341a439fe51SSam Ravnborg 	 * XXX: Due to SUN's broken floppy connector on AX and AXi
342a439fe51SSam Ravnborg 	 *      we need to turn on MOTOR_0 also, if the floppy is
343a439fe51SSam Ravnborg 	 *      jumpered to DS1 (like most PC floppies are). I hope
344a439fe51SSam Ravnborg 	 *      this does not hurt correct hardware like the AXmp.
345a439fe51SSam Ravnborg 	 *      (Eddie, Sep 12 1998).
346a439fe51SSam Ravnborg 	 */
3476cb7e696SWilly Tarreau 	if (reg == FD_DOR) {
348a439fe51SSam Ravnborg 		if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) {
349a439fe51SSam Ravnborg 			val &= ~(0x03);
350a439fe51SSam Ravnborg 			val |= 0x21;
351a439fe51SSam Ravnborg 		}
352a439fe51SSam Ravnborg 	}
3536cb7e696SWilly Tarreau 	outb(val, base + reg);
354a439fe51SSam Ravnborg }
355a439fe51SSam Ravnborg #endif /* PCI_FDC_SWAP_DRIVES */
356a439fe51SSam Ravnborg 
sun_pci_fd_enable_dma(void)357a439fe51SSam Ravnborg static void sun_pci_fd_enable_dma(void)
358a439fe51SSam Ravnborg {
359a439fe51SSam Ravnborg 	BUG_ON((NULL == sun_pci_dma_pending.buf) 	||
360a439fe51SSam Ravnborg 	    (0	  == sun_pci_dma_pending.len) 	||
361a439fe51SSam Ravnborg 	    (0	  == sun_pci_dma_pending.direction));
362a439fe51SSam Ravnborg 
363a439fe51SSam Ravnborg 	sun_pci_dma_current.buf = sun_pci_dma_pending.buf;
364a439fe51SSam Ravnborg 	sun_pci_dma_current.len = sun_pci_dma_pending.len;
365a439fe51SSam Ravnborg 	sun_pci_dma_current.direction = sun_pci_dma_pending.direction;
366a439fe51SSam Ravnborg 
367a439fe51SSam Ravnborg 	sun_pci_dma_pending.buf  = NULL;
368a439fe51SSam Ravnborg 	sun_pci_dma_pending.len  = 0;
369a439fe51SSam Ravnborg 	sun_pci_dma_pending.direction = 0;
370a439fe51SSam Ravnborg 	sun_pci_dma_pending.addr = -1U;
371a439fe51SSam Ravnborg 
372a439fe51SSam Ravnborg 	sun_pci_dma_current.addr =
3733ae627a1SDavid S. Miller 		dma_map_single(sun_floppy_dev,
374a439fe51SSam Ravnborg 			       sun_pci_dma_current.buf,
375a439fe51SSam Ravnborg 			       sun_pci_dma_current.len,
376a439fe51SSam Ravnborg 			       sun_pci_dma_current.direction);
377a439fe51SSam Ravnborg 
378a439fe51SSam Ravnborg 	ebus_dma_enable(&sun_pci_fd_ebus_dma, 1);
379a439fe51SSam Ravnborg 
380a439fe51SSam Ravnborg 	if (ebus_dma_request(&sun_pci_fd_ebus_dma,
381a439fe51SSam Ravnborg 			     sun_pci_dma_current.addr,
382a439fe51SSam Ravnborg 			     sun_pci_dma_current.len))
383a439fe51SSam Ravnborg 		BUG();
384a439fe51SSam Ravnborg }
385a439fe51SSam Ravnborg 
sun_pci_fd_disable_dma(void)386a439fe51SSam Ravnborg static void sun_pci_fd_disable_dma(void)
387a439fe51SSam Ravnborg {
388a439fe51SSam Ravnborg 	ebus_dma_enable(&sun_pci_fd_ebus_dma, 0);
389a439fe51SSam Ravnborg 	if (sun_pci_dma_current.addr != -1U)
3903ae627a1SDavid S. Miller 		dma_unmap_single(sun_floppy_dev,
391a439fe51SSam Ravnborg 				 sun_pci_dma_current.addr,
392a439fe51SSam Ravnborg 				 sun_pci_dma_current.len,
393a439fe51SSam Ravnborg 				 sun_pci_dma_current.direction);
394a439fe51SSam Ravnborg 	sun_pci_dma_current.addr = -1U;
395a439fe51SSam Ravnborg }
396a439fe51SSam Ravnborg 
sun_pci_fd_set_dma_mode(int mode)397a439fe51SSam Ravnborg static void sun_pci_fd_set_dma_mode(int mode)
398a439fe51SSam Ravnborg {
399a439fe51SSam Ravnborg 	if (mode == DMA_MODE_WRITE)
4003ae627a1SDavid S. Miller 		sun_pci_dma_pending.direction = DMA_TO_DEVICE;
401a439fe51SSam Ravnborg 	else
4023ae627a1SDavid S. Miller 		sun_pci_dma_pending.direction = DMA_FROM_DEVICE;
403a439fe51SSam Ravnborg 
404a439fe51SSam Ravnborg 	ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE);
405a439fe51SSam Ravnborg }
406a439fe51SSam Ravnborg 
sun_pci_fd_set_dma_count(int length)407a439fe51SSam Ravnborg static void sun_pci_fd_set_dma_count(int length)
408a439fe51SSam Ravnborg {
409a439fe51SSam Ravnborg 	sun_pci_dma_pending.len = length;
410a439fe51SSam Ravnborg }
411a439fe51SSam Ravnborg 
sun_pci_fd_set_dma_addr(char * buffer)412a439fe51SSam Ravnborg static void sun_pci_fd_set_dma_addr(char *buffer)
413a439fe51SSam Ravnborg {
414a439fe51SSam Ravnborg 	sun_pci_dma_pending.buf = buffer;
415a439fe51SSam Ravnborg }
416a439fe51SSam Ravnborg 
sun_pci_get_dma_residue(void)417a439fe51SSam Ravnborg static unsigned int sun_pci_get_dma_residue(void)
418a439fe51SSam Ravnborg {
419a439fe51SSam Ravnborg 	return ebus_dma_residue(&sun_pci_fd_ebus_dma);
420a439fe51SSam Ravnborg }
421a439fe51SSam Ravnborg 
sun_pci_fd_request_irq(void)422a439fe51SSam Ravnborg static int sun_pci_fd_request_irq(void)
423a439fe51SSam Ravnborg {
424a439fe51SSam Ravnborg 	return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1);
425a439fe51SSam Ravnborg }
426a439fe51SSam Ravnborg 
sun_pci_fd_free_irq(void)427a439fe51SSam Ravnborg static void sun_pci_fd_free_irq(void)
428a439fe51SSam Ravnborg {
429a439fe51SSam Ravnborg 	ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0);
430a439fe51SSam Ravnborg }
431a439fe51SSam Ravnborg 
sun_pci_fd_eject(int drive)432a439fe51SSam Ravnborg static int sun_pci_fd_eject(int drive)
433a439fe51SSam Ravnborg {
434a439fe51SSam Ravnborg 	return -EINVAL;
435a439fe51SSam Ravnborg }
436a439fe51SSam Ravnborg 
sun_pci_fd_dma_callback(struct ebus_dma_info * p,int event,void * cookie)437a439fe51SSam Ravnborg void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie)
438a439fe51SSam Ravnborg {
439a439fe51SSam Ravnborg 	floppy_interrupt(0, NULL);
440a439fe51SSam Ravnborg }
441a439fe51SSam Ravnborg 
442a439fe51SSam Ravnborg /*
443a439fe51SSam Ravnborg  * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI,
444a439fe51SSam Ravnborg  * even if this is configured using DS1, thus looks like /dev/fd1 with
445a439fe51SSam Ravnborg  * the cabling used in Ultras.
446a439fe51SSam Ravnborg  */
447a439fe51SSam Ravnborg #define DOR	(port + 2)
448a439fe51SSam Ravnborg #define MSR	(port + 4)
449a439fe51SSam Ravnborg #define FIFO	(port + 5)
450a439fe51SSam Ravnborg 
sun_pci_fd_out_byte(unsigned long port,unsigned char val,unsigned long reg)451a439fe51SSam Ravnborg static void sun_pci_fd_out_byte(unsigned long port, unsigned char val,
452a439fe51SSam Ravnborg 			        unsigned long reg)
453a439fe51SSam Ravnborg {
454a439fe51SSam Ravnborg 	unsigned char status;
455a439fe51SSam Ravnborg 	int timeout = 1000;
456a439fe51SSam Ravnborg 
457a439fe51SSam Ravnborg 	while (!((status = inb(MSR)) & 0x80) && --timeout)
458a439fe51SSam Ravnborg 		udelay(100);
459a439fe51SSam Ravnborg 	outb(val, reg);
460a439fe51SSam Ravnborg }
461a439fe51SSam Ravnborg 
sun_pci_fd_sensei(unsigned long port)462a439fe51SSam Ravnborg static unsigned char sun_pci_fd_sensei(unsigned long port)
463a439fe51SSam Ravnborg {
464a439fe51SSam Ravnborg 	unsigned char result[2] = { 0x70, 0x00 };
465a439fe51SSam Ravnborg 	unsigned char status;
466a439fe51SSam Ravnborg 	int i = 0;
467a439fe51SSam Ravnborg 
468a439fe51SSam Ravnborg 	sun_pci_fd_out_byte(port, 0x08, FIFO);
469a439fe51SSam Ravnborg 	do {
470a439fe51SSam Ravnborg 		int timeout = 1000;
471a439fe51SSam Ravnborg 
472a439fe51SSam Ravnborg 		while (!((status = inb(MSR)) & 0x80) && --timeout)
473a439fe51SSam Ravnborg 			udelay(100);
474a439fe51SSam Ravnborg 
475a439fe51SSam Ravnborg 		if (!timeout)
476a439fe51SSam Ravnborg 			break;
477a439fe51SSam Ravnborg 
478a439fe51SSam Ravnborg 		if ((status & 0xf0) == 0xd0)
479a439fe51SSam Ravnborg 			result[i++] = inb(FIFO);
480a439fe51SSam Ravnborg 		else
481a439fe51SSam Ravnborg 			break;
482a439fe51SSam Ravnborg 	} while (i < 2);
483a439fe51SSam Ravnborg 
484a439fe51SSam Ravnborg 	return result[0];
485a439fe51SSam Ravnborg }
486a439fe51SSam Ravnborg 
sun_pci_fd_reset(unsigned long port)487a439fe51SSam Ravnborg static void sun_pci_fd_reset(unsigned long port)
488a439fe51SSam Ravnborg {
489a439fe51SSam Ravnborg 	unsigned char mask = 0x00;
490a439fe51SSam Ravnborg 	unsigned char status;
491a439fe51SSam Ravnborg 	int timeout = 10000;
492a439fe51SSam Ravnborg 
493a439fe51SSam Ravnborg 	outb(0x80, MSR);
494a439fe51SSam Ravnborg 	do {
495a439fe51SSam Ravnborg 		status = sun_pci_fd_sensei(port);
496a439fe51SSam Ravnborg 		if ((status & 0xc0) == 0xc0)
497a439fe51SSam Ravnborg 			mask |= 1 << (status & 0x03);
498a439fe51SSam Ravnborg 		else
499a439fe51SSam Ravnborg 			udelay(100);
500a439fe51SSam Ravnborg 	} while ((mask != 0x0f) && --timeout);
501a439fe51SSam Ravnborg }
502a439fe51SSam Ravnborg 
sun_pci_fd_test_drive(unsigned long port,int drive)503a439fe51SSam Ravnborg static int sun_pci_fd_test_drive(unsigned long port, int drive)
504a439fe51SSam Ravnborg {
505a439fe51SSam Ravnborg 	unsigned char status, data;
506a439fe51SSam Ravnborg 	int timeout = 1000;
507a439fe51SSam Ravnborg 	int ready;
508a439fe51SSam Ravnborg 
509a439fe51SSam Ravnborg 	sun_pci_fd_reset(port);
510a439fe51SSam Ravnborg 
511a439fe51SSam Ravnborg 	data = (0x10 << drive) | 0x0c | drive;
512a439fe51SSam Ravnborg 	sun_pci_fd_out_byte(port, data, DOR);
513a439fe51SSam Ravnborg 
514a439fe51SSam Ravnborg 	sun_pci_fd_out_byte(port, 0x07, FIFO);
515a439fe51SSam Ravnborg 	sun_pci_fd_out_byte(port, drive & 0x03, FIFO);
516a439fe51SSam Ravnborg 
517a439fe51SSam Ravnborg 	do {
518a439fe51SSam Ravnborg 		udelay(100);
519a439fe51SSam Ravnborg 		status = sun_pci_fd_sensei(port);
520a439fe51SSam Ravnborg 	} while (((status & 0xc0) == 0x80) && --timeout);
521a439fe51SSam Ravnborg 
522a439fe51SSam Ravnborg 	if (!timeout)
523a439fe51SSam Ravnborg 		ready = 0;
524a439fe51SSam Ravnborg 	else
525a439fe51SSam Ravnborg 		ready = (status & 0x10) ? 0 : 1;
526a439fe51SSam Ravnborg 
527a439fe51SSam Ravnborg 	sun_pci_fd_reset(port);
528a439fe51SSam Ravnborg 	return ready;
529a439fe51SSam Ravnborg }
530a439fe51SSam Ravnborg #undef FIFO
531a439fe51SSam Ravnborg #undef MSR
532a439fe51SSam Ravnborg #undef DOR
533a439fe51SSam Ravnborg 
ebus_fdthree_p(struct device_node * dp)5343ae627a1SDavid S. Miller static int __init ebus_fdthree_p(struct device_node *dp)
535a439fe51SSam Ravnborg {
53629c990dfSRob Herring 	if (of_node_name_eq(dp, "fdthree"))
537a439fe51SSam Ravnborg 		return 1;
53829c990dfSRob Herring 	if (of_node_name_eq(dp, "floppy")) {
539a439fe51SSam Ravnborg 		const char *compat;
540a439fe51SSam Ravnborg 
5413ae627a1SDavid S. Miller 		compat = of_get_property(dp, "compatible", NULL);
542a439fe51SSam Ravnborg 		if (compat && !strcmp(compat, "fdthree"))
543a439fe51SSam Ravnborg 			return 1;
544a439fe51SSam Ravnborg 	}
545a439fe51SSam Ravnborg 	return 0;
546a439fe51SSam Ravnborg }
547a439fe51SSam Ravnborg 
sun_floppy_init(void)548a439fe51SSam Ravnborg static unsigned long __init sun_floppy_init(void)
549a439fe51SSam Ravnborg {
550a439fe51SSam Ravnborg 	static int initialized = 0;
55110a104f9SDavid S. Miller 	struct device_node *dp;
55294a0cb1fSGrant Likely 	struct platform_device *op;
55310a104f9SDavid S. Miller 	const char *prop;
55410a104f9SDavid S. Miller 	char state[128];
555a439fe51SSam Ravnborg 
556a439fe51SSam Ravnborg 	if (initialized)
557a439fe51SSam Ravnborg 		return sun_floppy_types[0];
558a439fe51SSam Ravnborg 	initialized = 1;
559a439fe51SSam Ravnborg 
56010a104f9SDavid S. Miller 	op = NULL;
56110a104f9SDavid S. Miller 
56210a104f9SDavid S. Miller 	for_each_node_by_name(dp, "SUNW,fdtwo") {
56329c990dfSRob Herring 		if (!of_node_name_eq(dp->parent, "sbus"))
56410a104f9SDavid S. Miller 			continue;
56510a104f9SDavid S. Miller 		op = of_find_device_by_node(dp);
56610a104f9SDavid S. Miller 		if (op)
567a439fe51SSam Ravnborg 			break;
568a439fe51SSam Ravnborg 	}
56910a104f9SDavid S. Miller 	if (op) {
57010a104f9SDavid S. Miller 		floppy_op = op;
5711636f8acSGrant Likely 		FLOPPY_IRQ = op->archdata.irqs[0];
572a439fe51SSam Ravnborg 	} else {
5733ae627a1SDavid S. Miller 		struct device_node *ebus_dp;
574a439fe51SSam Ravnborg 		void __iomem *auxio_reg;
575a439fe51SSam Ravnborg 		const char *state_prop;
5763ae627a1SDavid S. Miller 		unsigned long config;
577a439fe51SSam Ravnborg 
5783ae627a1SDavid S. Miller 		dp = NULL;
5793ae627a1SDavid S. Miller 		for_each_node_by_name(ebus_dp, "ebus") {
5803ae627a1SDavid S. Miller 			for (dp = ebus_dp->child; dp; dp = dp->sibling) {
5813ae627a1SDavid S. Miller 				if (ebus_fdthree_p(dp))
5823ae627a1SDavid S. Miller 					goto found_fdthree;
583a439fe51SSam Ravnborg 			}
584a439fe51SSam Ravnborg 		}
5853ae627a1SDavid S. Miller 	found_fdthree:
5863ae627a1SDavid S. Miller 		if (!dp)
587a439fe51SSam Ravnborg 			return 0;
588a439fe51SSam Ravnborg 
5893ae627a1SDavid S. Miller 		op = of_find_device_by_node(dp);
5903ae627a1SDavid S. Miller 		if (!op)
5913ae627a1SDavid S. Miller 			return 0;
59210a104f9SDavid S. Miller 
59361c7a080SGrant Likely 		state_prop = of_get_property(op->dev.of_node, "status", NULL);
594a439fe51SSam Ravnborg 		if (state_prop && !strncmp(state_prop, "disabled", 8))
595a439fe51SSam Ravnborg 			return 0;
596a439fe51SSam Ravnborg 
5971636f8acSGrant Likely 		FLOPPY_IRQ = op->archdata.irqs[0];
598a439fe51SSam Ravnborg 
599a439fe51SSam Ravnborg 		/* Make sure the high density bit is set, some systems
600a439fe51SSam Ravnborg 		 * (most notably Ultra5/Ultra10) come up with it clear.
601a439fe51SSam Ravnborg 		 */
6023ae627a1SDavid S. Miller 		auxio_reg = (void __iomem *) op->resource[2].start;
603a439fe51SSam Ravnborg 		writel(readl(auxio_reg)|0x2, auxio_reg);
604a439fe51SSam Ravnborg 
6053ae627a1SDavid S. Miller 		sun_floppy_dev = &op->dev;
606a439fe51SSam Ravnborg 
607a439fe51SSam Ravnborg 		spin_lock_init(&sun_pci_fd_ebus_dma.lock);
608a439fe51SSam Ravnborg 
609a439fe51SSam Ravnborg 		/* XXX ioremap */
610a439fe51SSam Ravnborg 		sun_pci_fd_ebus_dma.regs = (void __iomem *)
6113ae627a1SDavid S. Miller 			op->resource[1].start;
612a439fe51SSam Ravnborg 		if (!sun_pci_fd_ebus_dma.regs)
613a439fe51SSam Ravnborg 			return 0;
614a439fe51SSam Ravnborg 
615a439fe51SSam Ravnborg 		sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER |
616a439fe51SSam Ravnborg 					     EBUS_DMA_FLAG_TCI_DISABLE);
617a439fe51SSam Ravnborg 		sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback;
618a439fe51SSam Ravnborg 		sun_pci_fd_ebus_dma.client_cookie = NULL;
619a439fe51SSam Ravnborg 		sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ;
620a439fe51SSam Ravnborg 		strcpy(sun_pci_fd_ebus_dma.name, "floppy");
621a439fe51SSam Ravnborg 		if (ebus_dma_register(&sun_pci_fd_ebus_dma))
622a439fe51SSam Ravnborg 			return 0;
623a439fe51SSam Ravnborg 
624a439fe51SSam Ravnborg 		/* XXX ioremap */
6253ae627a1SDavid S. Miller 		sun_fdc = (struct sun_flpy_controller *) op->resource[0].start;
626a439fe51SSam Ravnborg 
627a439fe51SSam Ravnborg 		sun_fdops.fd_inb = sun_pci_fd_inb;
628a439fe51SSam Ravnborg 		sun_fdops.fd_outb = sun_pci_fd_outb;
629a439fe51SSam Ravnborg 
630a439fe51SSam Ravnborg 		can_use_virtual_dma = use_virtual_dma = 0;
631a439fe51SSam Ravnborg 		sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma;
632a439fe51SSam Ravnborg 		sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma;
633a439fe51SSam Ravnborg 		sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode;
634a439fe51SSam Ravnborg 		sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr;
635a439fe51SSam Ravnborg 		sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count;
636a439fe51SSam Ravnborg 		sun_fdops.get_dma_residue = sun_pci_get_dma_residue;
637a439fe51SSam Ravnborg 
638a439fe51SSam Ravnborg 		sun_fdops.fd_request_irq = sun_pci_fd_request_irq;
639a439fe51SSam Ravnborg 		sun_fdops.fd_free_irq = sun_pci_fd_free_irq;
640a439fe51SSam Ravnborg 
641a439fe51SSam Ravnborg 		sun_fdops.fd_eject = sun_pci_fd_eject;
642a439fe51SSam Ravnborg 
643a439fe51SSam Ravnborg 		fdc_status = (unsigned long) &sun_fdc->status_82077;
644a439fe51SSam Ravnborg 
645a439fe51SSam Ravnborg 		/*
646a439fe51SSam Ravnborg 		 * XXX: Find out on which machines this is really needed.
647a439fe51SSam Ravnborg 		 */
648a439fe51SSam Ravnborg 		if (1) {
649a439fe51SSam Ravnborg 			sun_pci_broken_drive = 1;
650a439fe51SSam Ravnborg 			sun_fdops.fd_outb = sun_pci_fd_broken_outb;
651a439fe51SSam Ravnborg 		}
652a439fe51SSam Ravnborg 
653a439fe51SSam Ravnborg 		allowed_drive_mask = 0;
654a439fe51SSam Ravnborg 		if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0))
655a439fe51SSam Ravnborg 			sun_floppy_types[0] = 4;
656a439fe51SSam Ravnborg 		if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1))
657a439fe51SSam Ravnborg 			sun_floppy_types[1] = 4;
658a439fe51SSam Ravnborg 
659a439fe51SSam Ravnborg 		/*
660a439fe51SSam Ravnborg 		 * Find NS87303 SuperIO config registers (through ecpp).
661a439fe51SSam Ravnborg 		 */
6623ae627a1SDavid S. Miller 		config = 0;
6633ae627a1SDavid S. Miller 		for (dp = ebus_dp->child; dp; dp = dp->sibling) {
66429c990dfSRob Herring 			if (of_node_name_eq(dp, "ecpp")) {
66594a0cb1fSGrant Likely 				struct platform_device *ecpp_op;
6663ae627a1SDavid S. Miller 
6673ae627a1SDavid S. Miller 				ecpp_op = of_find_device_by_node(dp);
6683ae627a1SDavid S. Miller 				if (ecpp_op)
6693ae627a1SDavid S. Miller 					config = ecpp_op->resource[1].start;
670a439fe51SSam Ravnborg 				goto config_done;
671a439fe51SSam Ravnborg 			}
672a439fe51SSam Ravnborg 		}
673a439fe51SSam Ravnborg 	config_done:
674a439fe51SSam Ravnborg 
675a439fe51SSam Ravnborg 		/*
676a439fe51SSam Ravnborg 		 * Sanity check, is this really the NS87303?
677a439fe51SSam Ravnborg 		 */
678a439fe51SSam Ravnborg 		switch (config & 0x3ff) {
679a439fe51SSam Ravnborg 		case 0x02e:
680a439fe51SSam Ravnborg 		case 0x15c:
681a439fe51SSam Ravnborg 		case 0x26e:
682a439fe51SSam Ravnborg 		case 0x398:
683a439fe51SSam Ravnborg 			break;
684a439fe51SSam Ravnborg 		default:
685a439fe51SSam Ravnborg 			config = 0;
686a439fe51SSam Ravnborg 		}
687a439fe51SSam Ravnborg 
688a439fe51SSam Ravnborg 		if (!config)
689a439fe51SSam Ravnborg 			return sun_floppy_types[0];
690a439fe51SSam Ravnborg 
691a439fe51SSam Ravnborg 		/* Enable PC-AT mode. */
692a439fe51SSam Ravnborg 		ns87303_modify(config, ASC, 0, 0xc0);
693a439fe51SSam Ravnborg 
694a439fe51SSam Ravnborg #ifdef PCI_FDC_SWAP_DRIVES
695a439fe51SSam Ravnborg 		/*
696a439fe51SSam Ravnborg 		 * If only Floppy 1 is present, swap drives.
697a439fe51SSam Ravnborg 		 */
698a439fe51SSam Ravnborg 		if (!sun_floppy_types[0] && sun_floppy_types[1]) {
699a439fe51SSam Ravnborg 			/*
700a439fe51SSam Ravnborg 			 * Set the drive exchange bit in FCR on NS87303,
701a439fe51SSam Ravnborg 			 * make sure other bits are sane before doing so.
702a439fe51SSam Ravnborg 			 */
703a439fe51SSam Ravnborg 			ns87303_modify(config, FER, FER_EDM, 0);
704a439fe51SSam Ravnborg 			ns87303_modify(config, ASC, ASC_DRV2_SEL, 0);
705a439fe51SSam Ravnborg 			ns87303_modify(config, FCR, 0, FCR_LDE);
706a439fe51SSam Ravnborg 
707a439fe51SSam Ravnborg 			config = sun_floppy_types[0];
708a439fe51SSam Ravnborg 			sun_floppy_types[0] = sun_floppy_types[1];
709a439fe51SSam Ravnborg 			sun_floppy_types[1] = config;
710a439fe51SSam Ravnborg 
711a439fe51SSam Ravnborg 			if (sun_pci_broken_drive != -1) {
712a439fe51SSam Ravnborg 				sun_pci_broken_drive = 1 - sun_pci_broken_drive;
713a439fe51SSam Ravnborg 				sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb;
714a439fe51SSam Ravnborg 			}
715a439fe51SSam Ravnborg 		}
716a439fe51SSam Ravnborg #endif /* PCI_FDC_SWAP_DRIVES */
717a439fe51SSam Ravnborg 
718a439fe51SSam Ravnborg 		return sun_floppy_types[0];
719a439fe51SSam Ravnborg 	}
72061c7a080SGrant Likely 	prop = of_get_property(op->dev.of_node, "status", NULL);
72110a104f9SDavid S. Miller 	if (prop && !strncmp(state, "disabled", 8))
722a439fe51SSam Ravnborg 		return 0;
723a439fe51SSam Ravnborg 
724a439fe51SSam Ravnborg 	/*
72510a104f9SDavid S. Miller 	 * We cannot do of_ioremap here: it does request_region,
726a439fe51SSam Ravnborg 	 * which the generic floppy driver tries to do once again.
727a439fe51SSam Ravnborg 	 * But we must use the sdev resource values as they have
728a439fe51SSam Ravnborg 	 * had parent ranges applied.
729a439fe51SSam Ravnborg 	 */
730a439fe51SSam Ravnborg 	sun_fdc = (struct sun_flpy_controller *)
73110a104f9SDavid S. Miller 		(op->resource[0].start +
73210a104f9SDavid S. Miller 		 ((op->resource[0].flags & 0x1ffUL) << 32UL));
733a439fe51SSam Ravnborg 
734a439fe51SSam Ravnborg 	/* Last minute sanity check... */
735a439fe51SSam Ravnborg 	if (sbus_readb(&sun_fdc->status1_82077) == 0xff) {
736a439fe51SSam Ravnborg 		sun_fdc = (struct sun_flpy_controller *)-1;
737a439fe51SSam Ravnborg 		return 0;
738a439fe51SSam Ravnborg 	}
739a439fe51SSam Ravnborg 
740a439fe51SSam Ravnborg         sun_fdops.fd_inb = sun_82077_fd_inb;
741a439fe51SSam Ravnborg         sun_fdops.fd_outb = sun_82077_fd_outb;
742a439fe51SSam Ravnborg 
743a439fe51SSam Ravnborg 	can_use_virtual_dma = use_virtual_dma = 1;
744a439fe51SSam Ravnborg 	sun_fdops.fd_enable_dma = sun_fd_enable_dma;
745a439fe51SSam Ravnborg 	sun_fdops.fd_disable_dma = sun_fd_disable_dma;
746a439fe51SSam Ravnborg 	sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode;
747a439fe51SSam Ravnborg 	sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr;
748a439fe51SSam Ravnborg 	sun_fdops.fd_set_dma_count = sun_fd_set_dma_count;
749a439fe51SSam Ravnborg 	sun_fdops.get_dma_residue = sun_get_dma_residue;
750a439fe51SSam Ravnborg 
751a439fe51SSam Ravnborg 	sun_fdops.fd_request_irq = sun_fd_request_irq;
752a439fe51SSam Ravnborg 	sun_fdops.fd_free_irq = sun_fd_free_irq;
753a439fe51SSam Ravnborg 
754a439fe51SSam Ravnborg 	sun_fdops.fd_eject = sun_fd_eject;
755a439fe51SSam Ravnborg 
756a439fe51SSam Ravnborg         fdc_status = (unsigned long) &sun_fdc->status_82077;
757a439fe51SSam Ravnborg 
758a439fe51SSam Ravnborg 	/* Success... */
759a439fe51SSam Ravnborg 	allowed_drive_mask = 0x01;
760a439fe51SSam Ravnborg 	sun_floppy_types[0] = 4;
761a439fe51SSam Ravnborg 	sun_floppy_types[1] = 0;
762a439fe51SSam Ravnborg 
763a439fe51SSam Ravnborg 	return sun_floppy_types[0];
764a439fe51SSam Ravnborg }
765a439fe51SSam Ravnborg 
766a439fe51SSam Ravnborg #define EXTRA_FLOPPY_PARAMS
767a439fe51SSam Ravnborg 
768a439fe51SSam Ravnborg static DEFINE_SPINLOCK(dma_spin_lock);
769a439fe51SSam Ravnborg 
770a439fe51SSam Ravnborg #define claim_dma_lock() \
771a439fe51SSam Ravnborg ({	unsigned long flags; \
772a439fe51SSam Ravnborg 	spin_lock_irqsave(&dma_spin_lock, flags); \
773a439fe51SSam Ravnborg 	flags; \
774a439fe51SSam Ravnborg })
775a439fe51SSam Ravnborg 
776a439fe51SSam Ravnborg #define release_dma_lock(__flags) \
777a439fe51SSam Ravnborg 	spin_unlock_irqrestore(&dma_spin_lock, __flags);
778a439fe51SSam Ravnborg 
779a439fe51SSam Ravnborg #endif /* !(__ASM_SPARC64_FLOPPY_H) */
780