1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _SPARC_CACHEFLUSH_H 3 #define _SPARC_CACHEFLUSH_H 4 5 #include <asm/cachetlb_32.h> 6 7 #define flush_cache_all() \ 8 sparc32_cachetlb_ops->cache_all() 9 #define flush_cache_mm(mm) \ 10 sparc32_cachetlb_ops->cache_mm(mm) 11 #define flush_cache_dup_mm(mm) \ 12 sparc32_cachetlb_ops->cache_mm(mm) 13 #define flush_cache_range(vma,start,end) \ 14 sparc32_cachetlb_ops->cache_range(vma, start, end) 15 #define flush_cache_page(vma,addr,pfn) \ 16 sparc32_cachetlb_ops->cache_page(vma, addr) 17 #define flush_icache_range(start, end) do { } while (0) 18 #define flush_icache_page(vma, pg) do { } while (0) 19 20 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 21 do { \ 22 flush_cache_page(vma, vaddr, page_to_pfn(page));\ 23 memcpy(dst, src, len); \ 24 } while (0) 25 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 26 do { \ 27 flush_cache_page(vma, vaddr, page_to_pfn(page));\ 28 memcpy(dst, src, len); \ 29 } while (0) 30 31 #define __flush_page_to_ram(addr) \ 32 sparc32_cachetlb_ops->page_to_ram(addr) 33 #define flush_sig_insns(mm,insn_addr) \ 34 sparc32_cachetlb_ops->sig_insns(mm, insn_addr) 35 #define flush_page_for_dma(addr) \ 36 sparc32_cachetlb_ops->page_for_dma(addr) 37 38 struct page; 39 void sparc_flush_page_to_ram(struct page *page); 40 41 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 42 #define flush_dcache_page(page) sparc_flush_page_to_ram(page) 43 #define flush_dcache_mmap_lock(mapping) do { } while (0) 44 #define flush_dcache_mmap_unlock(mapping) do { } while (0) 45 46 #define flush_cache_vmap(start, end) flush_cache_all() 47 #define flush_cache_vunmap(start, end) flush_cache_all() 48 49 /* When a context switch happens we must flush all user windows so that 50 * the windows of the current process are flushed onto its stack. This 51 * way the windows are all clean for the next process and the stack 52 * frames are up to date. 53 */ 54 void flush_user_windows(void); 55 void kill_user_windows(void); 56 void flushw_all(void); 57 58 #endif /* _SPARC_CACHEFLUSH_H */ 59