xref: /openbmc/linux/arch/sparc/include/asm/cache.h (revision 33def849)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2a439fe51SSam Ravnborg /* cache.h:  Cache specific code for the Sparc.  These include flushing
3a439fe51SSam Ravnborg  *           and direct tag/data line access.
4a439fe51SSam Ravnborg  *
5a439fe51SSam Ravnborg  * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
6a439fe51SSam Ravnborg  */
7a439fe51SSam Ravnborg 
8a439fe51SSam Ravnborg #ifndef _SPARC_CACHE_H
9a439fe51SSam Ravnborg #define _SPARC_CACHE_H
10a439fe51SSam Ravnborg 
11273fca0eSDavid S. Miller #define ARCH_SLAB_MINALIGN	__alignof__(unsigned long long)
12273fca0eSDavid S. Miller 
13a439fe51SSam Ravnborg #define L1_CACHE_SHIFT 5
14a439fe51SSam Ravnborg #define L1_CACHE_BYTES 32
15a439fe51SSam Ravnborg 
16a439fe51SSam Ravnborg #ifdef CONFIG_SPARC32
17a439fe51SSam Ravnborg #define SMP_CACHE_BYTES_SHIFT 5
18a439fe51SSam Ravnborg #else
19a439fe51SSam Ravnborg #define SMP_CACHE_BYTES_SHIFT 6
20a439fe51SSam Ravnborg #endif
21a439fe51SSam Ravnborg 
22a439fe51SSam Ravnborg #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
23a439fe51SSam Ravnborg 
2433def849SJoe Perches #define __read_mostly __section(".data..read_mostly")
25a439fe51SSam Ravnborg 
26a439fe51SSam Ravnborg #endif /* !(_SPARC_CACHE_H) */
27