xref: /openbmc/linux/arch/sh/mm/cache-j2.c (revision 4e95bc26)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * arch/sh/mm/cache-j2.c
4  *
5  * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
6  */
7 
8 #include <linux/init.h>
9 #include <linux/mm.h>
10 #include <linux/cpumask.h>
11 
12 #include <asm/cache.h>
13 #include <asm/addrspace.h>
14 #include <asm/processor.h>
15 #include <asm/cacheflush.h>
16 #include <asm/io.h>
17 
18 #define ICACHE_ENABLE	0x1
19 #define DCACHE_ENABLE	0x2
20 #define CACHE_ENABLE	(ICACHE_ENABLE | DCACHE_ENABLE)
21 #define ICACHE_FLUSH	0x100
22 #define DCACHE_FLUSH	0x200
23 #define CACHE_FLUSH	(ICACHE_FLUSH | DCACHE_FLUSH)
24 
25 u32 __iomem *j2_ccr_base;
26 
27 static void j2_flush_icache(void *args)
28 {
29 	unsigned cpu;
30 	for_each_possible_cpu(cpu)
31 		__raw_writel(CACHE_ENABLE | ICACHE_FLUSH, j2_ccr_base + cpu);
32 }
33 
34 static void j2_flush_dcache(void *args)
35 {
36 	unsigned cpu;
37 	for_each_possible_cpu(cpu)
38 		__raw_writel(CACHE_ENABLE | DCACHE_FLUSH, j2_ccr_base + cpu);
39 }
40 
41 static void j2_flush_both(void *args)
42 {
43 	unsigned cpu;
44 	for_each_possible_cpu(cpu)
45 		__raw_writel(CACHE_ENABLE | CACHE_FLUSH, j2_ccr_base + cpu);
46 }
47 
48 void __init j2_cache_init(void)
49 {
50 	if (!j2_ccr_base)
51 		return;
52 
53 	local_flush_cache_all = j2_flush_both;
54 	local_flush_cache_mm = j2_flush_both;
55 	local_flush_cache_dup_mm = j2_flush_both;
56 	local_flush_cache_page = j2_flush_both;
57 	local_flush_cache_range = j2_flush_both;
58 	local_flush_dcache_page = j2_flush_dcache;
59 	local_flush_icache_range = j2_flush_icache;
60 	local_flush_icache_page = j2_flush_icache;
61 	local_flush_cache_sigtramp = j2_flush_icache;
62 
63 	pr_info("Initial J2 CCR is %.8x\n", __raw_readl(j2_ccr_base));
64 }
65