xref: /openbmc/linux/arch/sh/mm/Makefile (revision ba61bb17) 
1# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the Linux SuperH-specific parts of the memory manager.
4#
5
6obj-y			:= alignment.o cache.o init.o consistent.o mmap.o
7
8cacheops-$(CONFIG_CPU_J2)		:= cache-j2.o
9cacheops-$(CONFIG_CPU_SUBTYPE_SH7619)	:= cache-sh2.o
10cacheops-$(CONFIG_CPU_SH2A)		:= cache-sh2a.o
11cacheops-$(CONFIG_CPU_SH3)		:= cache-sh3.o
12cacheops-$(CONFIG_CPU_SH4)		:= cache-sh4.o flush-sh4.o
13cacheops-$(CONFIG_CPU_SH5)		:= cache-sh5.o flush-sh4.o
14cacheops-$(CONFIG_SH7705_CACHE_32KB)	+= cache-sh7705.o
15cacheops-$(CONFIG_CPU_SHX3)		+= cache-shx3.o
16
17obj-y			+= $(cacheops-y)
18
19mmu-y			:= nommu.o extable_32.o
20mmu-$(CONFIG_MMU)	:= extable_$(BITS).o fault.o gup.o ioremap.o kmap.o \
21			   pgtable.o tlbex_$(BITS).o tlbflush_$(BITS).o
22
23obj-y			+= $(mmu-y)
24
25debugfs-y			:= asids-debugfs.o
26ifndef CONFIG_CACHE_OFF
27debugfs-$(CONFIG_CPU_SH4)	+= cache-debugfs.o
28endif
29
30ifdef CONFIG_MMU
31debugfs-$(CONFIG_CPU_SH4)	+= tlb-debugfs.o
32tlb-$(CONFIG_CPU_SH3)		:= tlb-sh3.o
33tlb-$(CONFIG_CPU_SH4)		:= tlb-sh4.o tlb-urb.o
34tlb-$(CONFIG_CPU_SH5)		:= tlb-sh5.o
35tlb-$(CONFIG_CPU_HAS_PTEAEX)	:= tlb-pteaex.o tlb-urb.o
36obj-y				+= $(tlb-y)
37endif
38
39obj-$(CONFIG_DEBUG_FS)		+= $(debugfs-y)
40obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o
41obj-$(CONFIG_PMB)		+= pmb.o
42obj-$(CONFIG_NUMA)		+= numa.o
43obj-$(CONFIG_IOREMAP_FIXED)	+= ioremap_fixed.o
44obj-$(CONFIG_UNCACHED_MAPPING)	+= uncached.o
45obj-$(CONFIG_HAVE_SRAM_POOL)	+= sram.o
46
47GCOV_PROFILE_pmb.o := n
48
49# Special flags for tlbex_64.o.  This puts restrictions on the number of
50# caller-save registers that the compiler can target when building this file.
51# This is required because the code is called from a context in entry.S where
52# very few registers have been saved in the exception handler (for speed
53# reasons).
54# The caller save registers that have been saved and which can be used are
55# r2,r3,r4,r5 : argument passing
56# r15, r18 : SP and LINK
57# tr0-4 : allow all caller-save TR's.  The compiler seems to be able to make
58#         use of them, so it's probably beneficial to performance to save them
59#         and have them available for it.
60#
61# The resources not listed below are callee save, i.e. the compiler is free to
62# use any of them and will spill them to the stack itself.
63
64CFLAGS_tlbex_64.o += -ffixed-r7 \
65	-ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \
66	-ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
67	-ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \
68	-ffixed-r24 -ffixed-r25 -ffixed-r26 -ffixed-r27 \
69	-ffixed-r36 -ffixed-r37 -ffixed-r38 -ffixed-r39 -ffixed-r40 \
70	-ffixed-r41 -ffixed-r42 -ffixed-r43  \
71	-ffixed-r60 -ffixed-r61 -ffixed-r62 \
72	-fomit-frame-pointer
73
74ccflags-y := -Werror
75