xref: /openbmc/linux/arch/sh/mm/Kconfig (revision cad82448)
1menu "Processor selection"
2
3#
4# Processor families
5#
6config CPU_SH2
7	bool
8	select SH_WRITETHROUGH
9
10config CPU_SH3
11	bool
12	select CPU_HAS_INTEVT
13	select CPU_HAS_SR_RB
14
15config CPU_SH4
16	bool
17	select CPU_HAS_INTEVT
18	select CPU_HAS_SR_RB
19
20config CPU_SH4A
21	bool
22	select CPU_SH4
23	select CPU_HAS_INTC2_IRQ
24
25config CPU_SUBTYPE_ST40
26	bool
27	select CPU_SH4
28	select CPU_HAS_INTC2_IRQ
29
30#
31# Processor subtypes
32#
33
34comment "SH-2 Processor Support"
35
36config CPU_SUBTYPE_SH7604
37	bool "Support SH7604 processor"
38	select CPU_SH2
39
40comment "SH-3 Processor Support"
41
42config CPU_SUBTYPE_SH7300
43	bool "Support SH7300 processor"
44	select CPU_SH3
45
46config CPU_SUBTYPE_SH7705
47	bool "Support SH7705 processor"
48	select CPU_SH3
49	select CPU_HAS_PINT_IRQ
50
51config CPU_SUBTYPE_SH7707
52	bool "Support SH7707 processor"
53	select CPU_SH3
54	select CPU_HAS_PINT_IRQ
55	help
56	  Select SH7707 if you have a  60 Mhz SH-3 HD6417707 CPU.
57
58config CPU_SUBTYPE_SH7708
59	bool "Support SH7708 processor"
60	select CPU_SH3
61	help
62	  Select SH7708 if you have a  60 Mhz SH-3 HD6417708S or
63	  if you have a 100 Mhz SH-3 HD6417708R CPU.
64
65config CPU_SUBTYPE_SH7709
66	bool "Support SH7709 processor"
67	select CPU_SH3
68	select CPU_HAS_PINT_IRQ
69	help
70	  Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.
71
72comment "SH-4 Processor Support"
73
74config CPU_SUBTYPE_SH7750
75	bool "Support SH7750 processor"
76	select CPU_SH4
77	help
78	  Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
79
80config CPU_SUBTYPE_SH7091
81	bool "Support SH7091 processor"
82	select CPU_SH4
83	select CPU_SUBTYPE_SH7750
84	help
85	  Select SH7091 if you have an SH-4 based Sega device (such as
86	  the Dreamcast, Naomi, and Naomi 2).
87
88config CPU_SUBTYPE_SH7750R
89	bool "Support SH7750R processor"
90	select CPU_SH4
91	select CPU_SUBTYPE_SH7750
92
93config CPU_SUBTYPE_SH7750S
94	bool "Support SH7750S processor"
95	select CPU_SH4
96	select CPU_SUBTYPE_SH7750
97
98config CPU_SUBTYPE_SH7751
99	bool "Support SH7751 processor"
100	select CPU_SH4
101	help
102	  Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
103	  or if you have a HD6417751R CPU.
104
105config CPU_SUBTYPE_SH7751R
106	bool "Support SH7751R processor"
107	select CPU_SH4
108	select CPU_SUBTYPE_SH7751
109
110config CPU_SUBTYPE_SH7760
111	bool "Support SH7760 processor"
112	select CPU_SH4
113	select CPU_HAS_INTC2_IRQ
114
115config CPU_SUBTYPE_SH4_202
116	bool "Support SH4-202 processor"
117	select CPU_SH4
118
119comment "ST40 Processor Support"
120
121config CPU_SUBTYPE_ST40STB1
122	bool "Support ST40STB1/ST40RA processors"
123	select CPU_SUBTYPE_ST40
124	help
125	  Select ST40STB1 if you have a ST40RA CPU.
126	  This was previously called the ST40STB1, hence the option name.
127
128config CPU_SUBTYPE_ST40GX1
129	bool "Support ST40GX1 processor"
130	select CPU_SUBTYPE_ST40
131	help
132	  Select ST40GX1 if you have a ST40GX1 CPU.
133
134comment "SH-4A Processor Support"
135
136config CPU_SUBTYPE_SH73180
137	bool "Support SH73180 processor"
138	select CPU_SH4A
139
140config CPU_SUBTYPE_SH7770
141	bool "Support SH7770 processor"
142	select CPU_SH4A
143
144config CPU_SUBTYPE_SH7780
145	bool "Support SH7780 processor"
146	select CPU_SH4A
147
148endmenu
149
150menu "Memory management options"
151
152config MMU
153        bool "Support for memory management hardware"
154	depends on !CPU_SH2
155	default y
156	help
157	  Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
158	  boot on these systems, this option must not be set.
159
160	  On other systems (such as the SH-3 and 4) where an MMU exists,
161	  turning this off will boot the kernel on these machines with the
162	  MMU implicitly switched off.
163
164config 32BIT
165	bool "Support 32-bit physical addressing through PMB"
166	depends on CPU_SH4A
167	default y
168	help
169	  If you say Y here, physical addressing will be extended to
170	  32-bits through the SH-4A PMB. If this is not set, legacy
171	  29-bit physical addressing will be used.
172
173choice
174	prompt "HugeTLB page size"
175	depends on HUGETLB_PAGE && CPU_SH4 && MMU
176	default HUGETLB_PAGE_SIZE_64K
177
178config HUGETLB_PAGE_SIZE_64K
179	bool "64K"
180
181config HUGETLB_PAGE_SIZE_1MB
182	bool "1MB"
183
184endchoice
185
186source "mm/Kconfig"
187
188endmenu
189
190menu "Cache configuration"
191
192config SH7705_CACHE_32KB
193	bool "Enable 32KB cache size for SH7705"
194	depends on CPU_SUBTYPE_SH7705
195	default y
196
197config SH_DIRECT_MAPPED
198	bool "Use direct-mapped caching"
199	default n
200	help
201	  Selecting this option will configure the caches to be direct-mapped,
202	  even if the cache supports a 2 or 4-way mode. This is useful primarily
203	  for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
204	  SH4-202, SH4-501, etc.)
205
206	  Turn this option off for platforms that do not have a direct-mapped
207	  cache, and you have no need to run the caches in such a configuration.
208
209config SH_WRITETHROUGH
210	bool "Use write-through caching"
211	default y if CPU_SH2
212	help
213	  Selecting this option will configure the caches in write-through
214	  mode, as opposed to the default write-back configuration.
215
216	  Since there's sill some aliasing issues on SH-4, this option will
217	  unfortunately still require the majority of flushing functions to
218	  be implemented to deal with aliasing.
219
220	  If unsure, say N.
221
222config SH_OCRAM
223	bool "Operand Cache RAM (OCRAM) support"
224	help
225	  Selecting this option will automatically tear down the number of
226	  sets in the dcache by half, which in turn exposes a memory range.
227
228	  The addresses for the OC RAM base will vary according to the
229	  processor version. Consult vendor documentation for specifics.
230
231	  If unsure, say N.
232
233endmenu
234