1menu "Processor selection" 2 3# 4# Processor families 5# 6config CPU_SH2 7 select SH_WRITETHROUGH if !CPU_SH2A 8 bool 9 10config CPU_SH2A 11 bool 12 select CPU_SH2 13 14config CPU_SH3 15 bool 16 select CPU_HAS_INTEVT 17 select CPU_HAS_SR_RB 18 19config CPU_SH4 20 bool 21 select CPU_HAS_INTEVT 22 select CPU_HAS_SR_RB 23 select CPU_HAS_PTEA if !CPU_SUBTYPE_ST40 24 25config CPU_SH4A 26 bool 27 select CPU_SH4 28 29config CPU_SH4AL_DSP 30 bool 31 select CPU_SH4A 32 33config CPU_SUBTYPE_ST40 34 bool 35 select CPU_SH4 36 select CPU_HAS_INTC2_IRQ 37 38# 39# Processor subtypes 40# 41 42comment "SH-2 Processor Support" 43 44config CPU_SUBTYPE_SH7604 45 bool "Support SH7604 processor" 46 select CPU_SH2 47 48config CPU_SUBTYPE_SH7619 49 bool "Support SH7619 processor" 50 select CPU_SH2 51 52comment "SH-2A Processor Support" 53 54config CPU_SUBTYPE_SH7206 55 bool "Support SH7206 processor" 56 select CPU_SH2A 57 58comment "SH-3 Processor Support" 59 60config CPU_SUBTYPE_SH7300 61 bool "Support SH7300 processor" 62 select CPU_SH3 63 64config CPU_SUBTYPE_SH7705 65 bool "Support SH7705 processor" 66 select CPU_SH3 67 select CPU_HAS_PINT_IRQ 68 69config CPU_SUBTYPE_SH7706 70 bool "Support SH7706 processor" 71 select CPU_SH3 72 help 73 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 74 75config CPU_SUBTYPE_SH7707 76 bool "Support SH7707 processor" 77 select CPU_SH3 78 select CPU_HAS_PINT_IRQ 79 help 80 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 81 82config CPU_SUBTYPE_SH7708 83 bool "Support SH7708 processor" 84 select CPU_SH3 85 help 86 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 87 if you have a 100 Mhz SH-3 HD6417708R CPU. 88 89config CPU_SUBTYPE_SH7709 90 bool "Support SH7709 processor" 91 select CPU_SH3 92 select CPU_HAS_PINT_IRQ 93 help 94 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 95 96config CPU_SUBTYPE_SH7710 97 bool "Support SH7710 processor" 98 select CPU_SH3 99 help 100 Select SH7710 if you have a SH3-DSP SH7710 CPU. 101 102comment "SH-4 Processor Support" 103 104config CPU_SUBTYPE_SH7750 105 bool "Support SH7750 processor" 106 select CPU_SH4 107 help 108 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 109 110config CPU_SUBTYPE_SH7091 111 bool "Support SH7091 processor" 112 select CPU_SH4 113 select CPU_SUBTYPE_SH7750 114 help 115 Select SH7091 if you have an SH-4 based Sega device (such as 116 the Dreamcast, Naomi, and Naomi 2). 117 118config CPU_SUBTYPE_SH7750R 119 bool "Support SH7750R processor" 120 select CPU_SH4 121 select CPU_SUBTYPE_SH7750 122 123config CPU_SUBTYPE_SH7750S 124 bool "Support SH7750S processor" 125 select CPU_SH4 126 select CPU_SUBTYPE_SH7750 127 128config CPU_SUBTYPE_SH7751 129 bool "Support SH7751 processor" 130 select CPU_SH4 131 help 132 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 133 or if you have a HD6417751R CPU. 134 135config CPU_SUBTYPE_SH7751R 136 bool "Support SH7751R processor" 137 select CPU_SH4 138 select CPU_SUBTYPE_SH7751 139 140config CPU_SUBTYPE_SH7760 141 bool "Support SH7760 processor" 142 select CPU_SH4 143 select CPU_HAS_INTC2_IRQ 144 145config CPU_SUBTYPE_SH4_202 146 bool "Support SH4-202 processor" 147 select CPU_SH4 148 149comment "ST40 Processor Support" 150 151config CPU_SUBTYPE_ST40STB1 152 bool "Support ST40STB1/ST40RA processors" 153 select CPU_SUBTYPE_ST40 154 help 155 Select ST40STB1 if you have a ST40RA CPU. 156 This was previously called the ST40STB1, hence the option name. 157 158config CPU_SUBTYPE_ST40GX1 159 bool "Support ST40GX1 processor" 160 select CPU_SUBTYPE_ST40 161 help 162 Select ST40GX1 if you have a ST40GX1 CPU. 163 164comment "SH-4A Processor Support" 165 166config CPU_SUBTYPE_SH7770 167 bool "Support SH7770 processor" 168 select CPU_SH4A 169 170config CPU_SUBTYPE_SH7780 171 bool "Support SH7780 processor" 172 select CPU_SH4A 173 select CPU_HAS_INTC2_IRQ 174 175config CPU_SUBTYPE_SH7785 176 bool "Support SH7785 processor" 177 select CPU_SH4A 178 select CPU_HAS_INTC2_IRQ 179 180comment "SH4AL-DSP Processor Support" 181 182config CPU_SUBTYPE_SH73180 183 bool "Support SH73180 processor" 184 select CPU_SH4AL_DSP 185 186config CPU_SUBTYPE_SH7343 187 bool "Support SH7343 processor" 188 select CPU_SH4AL_DSP 189 190endmenu 191 192menu "Memory management options" 193 194config MMU 195 bool "Support for memory management hardware" 196 depends on !CPU_SH2 197 default y 198 help 199 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 200 boot on these systems, this option must not be set. 201 202 On other systems (such as the SH-3 and 4) where an MMU exists, 203 turning this off will boot the kernel on these machines with the 204 MMU implicitly switched off. 205 206config PAGE_OFFSET 207 hex 208 default "0x80000000" if MMU 209 default "0x00000000" 210 211config MEMORY_START 212 hex "Physical memory start address" 213 default "0x08000000" 214 ---help--- 215 Computers built with Hitachi SuperH processors always 216 map the ROM starting at address zero. But the processor 217 does not specify the range that RAM takes. 218 219 The physical memory (RAM) start address will be automatically 220 set to 08000000. Other platforms, such as the Solution Engine 221 boards typically map RAM at 0C000000. 222 223 Tweak this only when porting to a new machine which does not 224 already have a defconfig. Changing it from the known correct 225 value on any of the known systems will only lead to disaster. 226 227config MEMORY_SIZE 228 hex "Physical memory size" 229 default "0x00400000" 230 help 231 This sets the default memory size assumed by your SH kernel. It can 232 be overridden as normal by the 'mem=' argument on the kernel command 233 line. If unsure, consult your board specifications or just leave it 234 as 0x00400000 which was the default value before this became 235 configurable. 236 237config 32BIT 238 bool "Support 32-bit physical addressing through PMB" 239 depends on CPU_SH4A && MMU && (!X2TLB || BROKEN) 240 default y 241 help 242 If you say Y here, physical addressing will be extended to 243 32-bits through the SH-4A PMB. If this is not set, legacy 244 29-bit physical addressing will be used. 245 246config X2TLB 247 bool "Enable extended TLB mode" 248 depends on CPU_SUBTYPE_SH7785 && MMU && EXPERIMENTAL 249 help 250 Selecting this option will enable the extended mode of the SH-X2 251 TLB. For legacy SH-X behaviour and interoperability, say N. For 252 all of the fun new features and a willingless to submit bug reports, 253 say Y. 254 255config VSYSCALL 256 bool "Support vsyscall page" 257 depends on MMU 258 default y 259 help 260 This will enable support for the kernel mapping a vDSO page 261 in process space, and subsequently handing down the entry point 262 to the libc through the ELF auxiliary vector. 263 264 From the kernel side this is used for the signal trampoline. 265 For systems with an MMU that can afford to give up a page, 266 (the default value) say Y. 267 268choice 269 prompt "Kernel page size" 270 default PAGE_SIZE_4KB 271 272config PAGE_SIZE_4KB 273 bool "4kB" 274 help 275 This is the default page size used by all SuperH CPUs. 276 277config PAGE_SIZE_8KB 278 bool "8kB" 279 depends on EXPERIMENTAL && X2TLB 280 help 281 This enables 8kB pages as supported by SH-X2 and later MMUs. 282 283config PAGE_SIZE_64KB 284 bool "64kB" 285 depends on EXPERIMENTAL && CPU_SH4 286 help 287 This enables support for 64kB pages, possible on all SH-4 288 CPUs and later. Highly experimental, not recommended. 289 290endchoice 291 292choice 293 prompt "HugeTLB page size" 294 depends on HUGETLB_PAGE && CPU_SH4 && MMU 295 default HUGETLB_PAGE_SIZE_64K 296 297config HUGETLB_PAGE_SIZE_64K 298 bool "64kB" 299 300config HUGETLB_PAGE_SIZE_256K 301 bool "256kB" 302 depends on X2TLB 303 304config HUGETLB_PAGE_SIZE_1MB 305 bool "1MB" 306 307config HUGETLB_PAGE_SIZE_4MB 308 bool "4MB" 309 depends on X2TLB 310 311config HUGETLB_PAGE_SIZE_64MB 312 bool "64MB" 313 depends on X2TLB 314 315endchoice 316 317source "mm/Kconfig" 318 319endmenu 320 321menu "Cache configuration" 322 323config SH7705_CACHE_32KB 324 bool "Enable 32KB cache size for SH7705" 325 depends on CPU_SUBTYPE_SH7705 326 default y 327 328config SH_DIRECT_MAPPED 329 bool "Use direct-mapped caching" 330 default n 331 help 332 Selecting this option will configure the caches to be direct-mapped, 333 even if the cache supports a 2 or 4-way mode. This is useful primarily 334 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R, 335 SH4-202, SH4-501, etc.) 336 337 Turn this option off for platforms that do not have a direct-mapped 338 cache, and you have no need to run the caches in such a configuration. 339 340config SH_WRITETHROUGH 341 bool "Use write-through caching" 342 help 343 Selecting this option will configure the caches in write-through 344 mode, as opposed to the default write-back configuration. 345 346 Since there's sill some aliasing issues on SH-4, this option will 347 unfortunately still require the majority of flushing functions to 348 be implemented to deal with aliasing. 349 350 If unsure, say N. 351 352config SH_OCRAM 353 bool "Operand Cache RAM (OCRAM) support" 354 help 355 Selecting this option will automatically tear down the number of 356 sets in the dcache by half, which in turn exposes a memory range. 357 358 The addresses for the OC RAM base will vary according to the 359 processor version. Consult vendor documentation for specifics. 360 361 If unsure, say N. 362 363endmenu 364