xref: /openbmc/linux/arch/sh/mm/Kconfig (revision 78c99ba1) 
1menu "Memory management options"
2
3config QUICKLIST
4	def_bool y
5
6config MMU
7        bool "Support for memory management hardware"
8	depends on !CPU_SH2
9	default y
10	help
11	  Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
12	  boot on these systems, this option must not be set.
13
14	  On other systems (such as the SH-3 and 4) where an MMU exists,
15	  turning this off will boot the kernel on these machines with the
16	  MMU implicitly switched off.
17
18config PAGE_OFFSET
19	hex
20	default "0x80000000" if MMU && SUPERH32
21	default "0x20000000" if MMU && SUPERH64
22	default "0x00000000"
23
24config FORCE_MAX_ZONEORDER
25	int "Maximum zone order"
26	range 9 64 if PAGE_SIZE_16KB
27	default "9" if PAGE_SIZE_16KB
28	range 7 64 if PAGE_SIZE_64KB
29	default "7" if PAGE_SIZE_64KB
30	range 11 64
31	default "14" if !MMU
32	default "11"
33	help
34	  The kernel memory allocator divides physically contiguous memory
35	  blocks into "zones", where each zone is a power of two number of
36	  pages.  This option selects the largest power of two that the kernel
37	  keeps in the memory allocator.  If you need to allocate very large
38	  blocks of physically contiguous memory, then you may need to
39	  increase this value.
40
41	  This config option is actually maximum order plus one. For example,
42	  a value of 11 means that the largest free memory block is 2^10 pages.
43
44	  The page size is not necessarily 4KB. Keep this in mind when
45	  choosing a value for this option.
46
47config MEMORY_START
48	hex "Physical memory start address"
49	default "0x08000000"
50	---help---
51	  Computers built with Hitachi SuperH processors always
52	  map the ROM starting at address zero.  But the processor
53	  does not specify the range that RAM takes.
54
55	  The physical memory (RAM) start address will be automatically
56	  set to 08000000. Other platforms, such as the Solution Engine
57	  boards typically map RAM at 0C000000.
58
59	  Tweak this only when porting to a new machine which does not
60	  already have a defconfig. Changing it from the known correct
61	  value on any of the known systems will only lead to disaster.
62
63config MEMORY_SIZE
64	hex "Physical memory size"
65	default "0x04000000"
66	help
67	  This sets the default memory size assumed by your SH kernel. It can
68	  be overridden as normal by the 'mem=' argument on the kernel command
69	  line. If unsure, consult your board specifications or just leave it
70	  as 0x04000000 which was the default value before this became
71	  configurable.
72
73# Physical addressing modes
74
75config 29BIT
76	def_bool !32BIT
77	depends on SUPERH32
78
79config 32BIT
80	bool
81	default y if CPU_SH5
82
83config PMB_ENABLE
84	bool "Support 32-bit physical addressing through PMB"
85	depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
86	select 32BIT
87	default y
88	help
89	  If you say Y here, physical addressing will be extended to
90	  32-bits through the SH-4A PMB. If this is not set, legacy
91	  29-bit physical addressing will be used.
92
93choice
94	prompt "PMB handling type"
95	depends on PMB_ENABLE
96	default PMB_FIXED
97
98config PMB
99	bool "PMB"
100	depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
101	select 32BIT
102	help
103	  If you say Y here, physical addressing will be extended to
104	  32-bits through the SH-4A PMB. If this is not set, legacy
105	  29-bit physical addressing will be used.
106
107config PMB_FIXED
108	bool "fixed PMB"
109	depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \
110					   CPU_SUBTYPE_SH7785)
111	select 32BIT
112	help
113	  If this option is enabled, fixed PMB mappings are inherited
114	  from the boot loader, and the kernel does not attempt dynamic
115	  management. This is the closest to legacy 29-bit physical mode,
116	  and allows systems to support up to 512MiB of system memory.
117
118endchoice
119
120config X2TLB
121	bool "Enable extended TLB mode"
122	depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL
123	help
124	  Selecting this option will enable the extended mode of the SH-X2
125	  TLB. For legacy SH-X behaviour and interoperability, say N. For
126	  all of the fun new features and a willingless to submit bug reports,
127	  say Y.
128
129config VSYSCALL
130	bool "Support vsyscall page"
131	depends on MMU && (CPU_SH3 || CPU_SH4)
132	default y
133	help
134	  This will enable support for the kernel mapping a vDSO page
135	  in process space, and subsequently handing down the entry point
136	  to the libc through the ELF auxiliary vector.
137
138	  From the kernel side this is used for the signal trampoline.
139	  For systems with an MMU that can afford to give up a page,
140	  (the default value) say Y.
141
142config NUMA
143	bool "Non Uniform Memory Access (NUMA) Support"
144	depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
145	default n
146	help
147	  Some SH systems have many various memories scattered around
148	  the address space, each with varying latencies. This enables
149	  support for these blocks by binding them to nodes and allowing
150	  memory policies to be used for prioritizing and controlling
151	  allocation behaviour.
152
153config NODES_SHIFT
154	int
155	default "3" if CPU_SUBTYPE_SHX3
156	default "1"
157	depends on NEED_MULTIPLE_NODES
158
159config ARCH_FLATMEM_ENABLE
160	def_bool y
161	depends on !NUMA
162
163config ARCH_SPARSEMEM_ENABLE
164	def_bool y
165	select SPARSEMEM_STATIC
166
167config ARCH_SPARSEMEM_DEFAULT
168	def_bool y
169
170config MAX_ACTIVE_REGIONS
171	int
172	default "6" if (CPU_SUBTYPE_SHX3 && SPARSEMEM)
173	default "2" if SPARSEMEM && (CPU_SUBTYPE_SH7722 || \
174		       CPU_SUBTYPE_SH7785)
175	default "1"
176
177config ARCH_POPULATES_NODE_MAP
178	def_bool y
179
180config ARCH_SELECT_MEMORY_MODEL
181	def_bool y
182
183config ARCH_ENABLE_MEMORY_HOTPLUG
184	def_bool y
185	depends on SPARSEMEM && MMU
186
187config ARCH_ENABLE_MEMORY_HOTREMOVE
188	def_bool y
189	depends on SPARSEMEM && MMU
190
191config ARCH_MEMORY_PROBE
192	def_bool y
193	depends on MEMORY_HOTPLUG
194
195choice
196	prompt "Kernel page size"
197	default PAGE_SIZE_8KB if X2TLB
198	default PAGE_SIZE_4KB
199
200config PAGE_SIZE_4KB
201	bool "4kB"
202	depends on !MMU || !X2TLB
203	help
204	  This is the default page size used by all SuperH CPUs.
205
206config PAGE_SIZE_8KB
207	bool "8kB"
208	depends on !MMU || X2TLB
209	help
210	  This enables 8kB pages as supported by SH-X2 and later MMUs.
211
212config PAGE_SIZE_16KB
213	bool "16kB"
214	depends on !MMU
215	help
216	  This enables 16kB pages on MMU-less SH systems.
217
218config PAGE_SIZE_64KB
219	bool "64kB"
220	depends on !MMU || CPU_SH4 || CPU_SH5
221	help
222	  This enables support for 64kB pages, possible on all SH-4
223	  CPUs and later.
224
225endchoice
226
227choice
228	prompt "HugeTLB page size"
229	depends on HUGETLB_PAGE && (CPU_SH4 || CPU_SH5) && MMU
230	default HUGETLB_PAGE_SIZE_1MB if PAGE_SIZE_64KB
231	default HUGETLB_PAGE_SIZE_64K
232
233config HUGETLB_PAGE_SIZE_64K
234	bool "64kB"
235	depends on !PAGE_SIZE_64KB
236
237config HUGETLB_PAGE_SIZE_256K
238	bool "256kB"
239	depends on X2TLB
240
241config HUGETLB_PAGE_SIZE_1MB
242	bool "1MB"
243
244config HUGETLB_PAGE_SIZE_4MB
245	bool "4MB"
246	depends on X2TLB
247
248config HUGETLB_PAGE_SIZE_64MB
249	bool "64MB"
250	depends on X2TLB
251
252config HUGETLB_PAGE_SIZE_512MB
253	bool "512MB"
254	depends on CPU_SH5
255
256endchoice
257
258source "mm/Kconfig"
259
260endmenu
261
262menu "Cache configuration"
263
264config SH7705_CACHE_32KB
265	bool "Enable 32KB cache size for SH7705"
266	depends on CPU_SUBTYPE_SH7705
267	default y
268
269choice
270	prompt "Cache mode"
271	default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 || CPU_SH5
272	default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A)
273
274config CACHE_WRITEBACK
275	bool "Write-back"
276
277config CACHE_WRITETHROUGH
278	bool "Write-through"
279	help
280	  Selecting this option will configure the caches in write-through
281	  mode, as opposed to the default write-back configuration.
282
283	  Since there's sill some aliasing issues on SH-4, this option will
284	  unfortunately still require the majority of flushing functions to
285	  be implemented to deal with aliasing.
286
287	  If unsure, say N.
288
289config CACHE_OFF
290	bool "Off"
291
292endchoice
293
294endmenu
295