1menu "Processor selection" 2 3# 4# Processor families 5# 6config CPU_SH2 7 select SH_WRITETHROUGH if !CPU_SH2A 8 bool 9 10config CPU_SH2A 11 bool 12 select CPU_SH2 13 14config CPU_SH3 15 bool 16 select CPU_HAS_INTEVT 17 select CPU_HAS_SR_RB 18 19config CPU_SH4 20 bool 21 select CPU_HAS_INTEVT 22 select CPU_HAS_SR_RB 23 select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2 24 25config CPU_SH4A 26 bool 27 select CPU_SH4 28 29config CPU_SH4AL_DSP 30 bool 31 select CPU_SH4A 32 33config CPU_SUBTYPE_ST40 34 bool 35 select CPU_SH4 36 select CPU_HAS_INTC2_IRQ 37 38config CPU_SHX2 39 bool 40 41# 42# Processor subtypes 43# 44 45comment "SH-2 Processor Support" 46 47config CPU_SUBTYPE_SH7604 48 bool "Support SH7604 processor" 49 select CPU_SH2 50 51config CPU_SUBTYPE_SH7619 52 bool "Support SH7619 processor" 53 select CPU_SH2 54 55comment "SH-2A Processor Support" 56 57config CPU_SUBTYPE_SH7206 58 bool "Support SH7206 processor" 59 select CPU_SH2A 60 61comment "SH-3 Processor Support" 62 63config CPU_SUBTYPE_SH7300 64 bool "Support SH7300 processor" 65 select CPU_SH3 66 67config CPU_SUBTYPE_SH7705 68 bool "Support SH7705 processor" 69 select CPU_SH3 70 select CPU_HAS_PINT_IRQ 71 72config CPU_SUBTYPE_SH7706 73 bool "Support SH7706 processor" 74 select CPU_SH3 75 select CPU_HAS_IPR_IRQ 76 help 77 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 78 79config CPU_SUBTYPE_SH7707 80 bool "Support SH7707 processor" 81 select CPU_SH3 82 select CPU_HAS_PINT_IRQ 83 help 84 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 85 86config CPU_SUBTYPE_SH7708 87 bool "Support SH7708 processor" 88 select CPU_SH3 89 help 90 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 91 if you have a 100 Mhz SH-3 HD6417708R CPU. 92 93config CPU_SUBTYPE_SH7709 94 bool "Support SH7709 processor" 95 select CPU_SH3 96 select CPU_HAS_IPR_IRQ 97 select CPU_HAS_PINT_IRQ 98 help 99 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 100 101config CPU_SUBTYPE_SH7710 102 bool "Support SH7710 processor" 103 select CPU_SH3 104 help 105 Select SH7710 if you have a SH3-DSP SH7710 CPU. 106 107comment "SH-4 Processor Support" 108 109config CPU_SUBTYPE_SH7750 110 bool "Support SH7750 processor" 111 select CPU_SH4 112 select CPU_HAS_IPR_IRQ 113 help 114 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 115 116config CPU_SUBTYPE_SH7091 117 bool "Support SH7091 processor" 118 select CPU_SH4 119 select CPU_SUBTYPE_SH7750 120 help 121 Select SH7091 if you have an SH-4 based Sega device (such as 122 the Dreamcast, Naomi, and Naomi 2). 123 124config CPU_SUBTYPE_SH7750R 125 bool "Support SH7750R processor" 126 select CPU_SH4 127 select CPU_SUBTYPE_SH7750 128 select CPU_HAS_IPR_IRQ 129 130config CPU_SUBTYPE_SH7750S 131 bool "Support SH7750S processor" 132 select CPU_SH4 133 select CPU_SUBTYPE_SH7750 134 select CPU_HAS_IPR_IRQ 135 136config CPU_SUBTYPE_SH7751 137 bool "Support SH7751 processor" 138 select CPU_SH4 139 select CPU_HAS_IPR_IRQ 140 help 141 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 142 or if you have a HD6417751R CPU. 143 144config CPU_SUBTYPE_SH7751R 145 bool "Support SH7751R processor" 146 select CPU_SH4 147 select CPU_SUBTYPE_SH7751 148 select CPU_HAS_IPR_IRQ 149 150config CPU_SUBTYPE_SH7760 151 bool "Support SH7760 processor" 152 select CPU_SH4 153 select CPU_HAS_INTC2_IRQ 154 select CPU_HAS_IPR_IRQ 155 156config CPU_SUBTYPE_SH4_202 157 bool "Support SH4-202 processor" 158 select CPU_SH4 159 160comment "ST40 Processor Support" 161 162config CPU_SUBTYPE_ST40STB1 163 bool "Support ST40STB1/ST40RA processors" 164 select CPU_SUBTYPE_ST40 165 help 166 Select ST40STB1 if you have a ST40RA CPU. 167 This was previously called the ST40STB1, hence the option name. 168 169config CPU_SUBTYPE_ST40GX1 170 bool "Support ST40GX1 processor" 171 select CPU_SUBTYPE_ST40 172 help 173 Select ST40GX1 if you have a ST40GX1 CPU. 174 175comment "SH-4A Processor Support" 176 177config CPU_SUBTYPE_SH7770 178 bool "Support SH7770 processor" 179 select CPU_SH4A 180 181config CPU_SUBTYPE_SH7780 182 bool "Support SH7780 processor" 183 select CPU_SH4A 184 select CPU_HAS_INTC2_IRQ 185 186config CPU_SUBTYPE_SH7785 187 bool "Support SH7785 processor" 188 select CPU_SH4A 189 select CPU_SHX2 190 select CPU_HAS_INTC2_IRQ 191 192comment "SH4AL-DSP Processor Support" 193 194config CPU_SUBTYPE_SH73180 195 bool "Support SH73180 processor" 196 select CPU_SH4AL_DSP 197 198config CPU_SUBTYPE_SH7343 199 bool "Support SH7343 processor" 200 select CPU_SH4AL_DSP 201 202config CPU_SUBTYPE_SH7722 203 bool "Support SH7722 processor" 204 select CPU_SH4AL_DSP 205 select CPU_SHX2 206 select CPU_HAS_IPR_IRQ 207 208endmenu 209 210menu "Memory management options" 211 212config MMU 213 bool "Support for memory management hardware" 214 depends on !CPU_SH2 215 default y 216 help 217 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 218 boot on these systems, this option must not be set. 219 220 On other systems (such as the SH-3 and 4) where an MMU exists, 221 turning this off will boot the kernel on these machines with the 222 MMU implicitly switched off. 223 224config PAGE_OFFSET 225 hex 226 default "0x80000000" if MMU 227 default "0x00000000" 228 229config MEMORY_START 230 hex "Physical memory start address" 231 default "0x08000000" 232 ---help--- 233 Computers built with Hitachi SuperH processors always 234 map the ROM starting at address zero. But the processor 235 does not specify the range that RAM takes. 236 237 The physical memory (RAM) start address will be automatically 238 set to 08000000. Other platforms, such as the Solution Engine 239 boards typically map RAM at 0C000000. 240 241 Tweak this only when porting to a new machine which does not 242 already have a defconfig. Changing it from the known correct 243 value on any of the known systems will only lead to disaster. 244 245config MEMORY_SIZE 246 hex "Physical memory size" 247 default "0x00400000" 248 help 249 This sets the default memory size assumed by your SH kernel. It can 250 be overridden as normal by the 'mem=' argument on the kernel command 251 line. If unsure, consult your board specifications or just leave it 252 as 0x00400000 which was the default value before this became 253 configurable. 254 255config 32BIT 256 bool "Support 32-bit physical addressing through PMB" 257 depends on CPU_SH4A && MMU && (!X2TLB || BROKEN) 258 default y 259 help 260 If you say Y here, physical addressing will be extended to 261 32-bits through the SH-4A PMB. If this is not set, legacy 262 29-bit physical addressing will be used. 263 264config X2TLB 265 bool "Enable extended TLB mode" 266 depends on CPU_SHX2 && MMU && EXPERIMENTAL 267 help 268 Selecting this option will enable the extended mode of the SH-X2 269 TLB. For legacy SH-X behaviour and interoperability, say N. For 270 all of the fun new features and a willingless to submit bug reports, 271 say Y. 272 273config VSYSCALL 274 bool "Support vsyscall page" 275 depends on MMU 276 default y 277 help 278 This will enable support for the kernel mapping a vDSO page 279 in process space, and subsequently handing down the entry point 280 to the libc through the ELF auxiliary vector. 281 282 From the kernel side this is used for the signal trampoline. 283 For systems with an MMU that can afford to give up a page, 284 (the default value) say Y. 285 286choice 287 prompt "Kernel page size" 288 default PAGE_SIZE_4KB 289 290config PAGE_SIZE_4KB 291 bool "4kB" 292 help 293 This is the default page size used by all SuperH CPUs. 294 295config PAGE_SIZE_8KB 296 bool "8kB" 297 depends on EXPERIMENTAL && X2TLB 298 help 299 This enables 8kB pages as supported by SH-X2 and later MMUs. 300 301config PAGE_SIZE_64KB 302 bool "64kB" 303 depends on EXPERIMENTAL && CPU_SH4 304 help 305 This enables support for 64kB pages, possible on all SH-4 306 CPUs and later. Highly experimental, not recommended. 307 308endchoice 309 310choice 311 prompt "HugeTLB page size" 312 depends on HUGETLB_PAGE && CPU_SH4 && MMU 313 default HUGETLB_PAGE_SIZE_64K 314 315config HUGETLB_PAGE_SIZE_64K 316 bool "64kB" 317 318config HUGETLB_PAGE_SIZE_256K 319 bool "256kB" 320 depends on X2TLB 321 322config HUGETLB_PAGE_SIZE_1MB 323 bool "1MB" 324 325config HUGETLB_PAGE_SIZE_4MB 326 bool "4MB" 327 depends on X2TLB 328 329config HUGETLB_PAGE_SIZE_64MB 330 bool "64MB" 331 depends on X2TLB 332 333endchoice 334 335source "mm/Kconfig" 336 337endmenu 338 339menu "Cache configuration" 340 341config SH7705_CACHE_32KB 342 bool "Enable 32KB cache size for SH7705" 343 depends on CPU_SUBTYPE_SH7705 344 default y 345 346config SH_DIRECT_MAPPED 347 bool "Use direct-mapped caching" 348 default n 349 help 350 Selecting this option will configure the caches to be direct-mapped, 351 even if the cache supports a 2 or 4-way mode. This is useful primarily 352 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R, 353 SH4-202, SH4-501, etc.) 354 355 Turn this option off for platforms that do not have a direct-mapped 356 cache, and you have no need to run the caches in such a configuration. 357 358config SH_WRITETHROUGH 359 bool "Use write-through caching" 360 help 361 Selecting this option will configure the caches in write-through 362 mode, as opposed to the default write-back configuration. 363 364 Since there's sill some aliasing issues on SH-4, this option will 365 unfortunately still require the majority of flushing functions to 366 be implemented to deal with aliasing. 367 368 If unsure, say N. 369 370config SH_OCRAM 371 bool "Operand Cache RAM (OCRAM) support" 372 help 373 Selecting this option will automatically tear down the number of 374 sets in the dcache by half, which in turn exposes a memory range. 375 376 The addresses for the OC RAM base will vary according to the 377 processor version. Consult vendor documentation for specifics. 378 379 If unsure, say N. 380 381endmenu 382