1menu "Processor selection" 2 3# 4# Processor families 5# 6config CPU_SH2 7 select SH_WRITETHROUGH if !CPU_SH2A 8 bool 9 10config CPU_SH2A 11 bool 12 select CPU_SH2 13 14config CPU_SH3 15 bool 16 select CPU_HAS_INTEVT 17 select CPU_HAS_SR_RB 18 19config CPU_SH4 20 bool 21 select CPU_HAS_INTEVT 22 select CPU_HAS_SR_RB 23 select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2 24 25config CPU_SH4A 26 bool 27 select CPU_SH4 28 29config CPU_SH4AL_DSP 30 bool 31 select CPU_SH4A 32 33config CPU_SUBTYPE_ST40 34 bool 35 select CPU_SH4 36 select CPU_HAS_INTC2_IRQ 37 38config CPU_SHX2 39 bool 40 41# 42# Processor subtypes 43# 44 45comment "SH-2 Processor Support" 46 47config CPU_SUBTYPE_SH7604 48 bool "Support SH7604 processor" 49 select CPU_SH2 50 51config CPU_SUBTYPE_SH7619 52 bool "Support SH7619 processor" 53 select CPU_SH2 54 55comment "SH-2A Processor Support" 56 57config CPU_SUBTYPE_SH7206 58 bool "Support SH7206 processor" 59 select CPU_SH2A 60 61comment "SH-3 Processor Support" 62 63config CPU_SUBTYPE_SH7300 64 bool "Support SH7300 processor" 65 select CPU_SH3 66 67config CPU_SUBTYPE_SH7705 68 bool "Support SH7705 processor" 69 select CPU_SH3 70 select CPU_HAS_PINT_IRQ 71 72config CPU_SUBTYPE_SH7706 73 bool "Support SH7706 processor" 74 select CPU_SH3 75 select CPU_HAS_IPR_IRQ 76 help 77 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 78 79config CPU_SUBTYPE_SH7707 80 bool "Support SH7707 processor" 81 select CPU_SH3 82 select CPU_HAS_PINT_IRQ 83 help 84 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 85 86config CPU_SUBTYPE_SH7708 87 bool "Support SH7708 processor" 88 select CPU_SH3 89 help 90 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 91 if you have a 100 Mhz SH-3 HD6417708R CPU. 92 93config CPU_SUBTYPE_SH7709 94 bool "Support SH7709 processor" 95 select CPU_SH3 96 select CPU_HAS_IPR_IRQ 97 select CPU_HAS_PINT_IRQ 98 help 99 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 100 101config CPU_SUBTYPE_SH7710 102 bool "Support SH7710 processor" 103 select CPU_SH3 104 help 105 Select SH7710 if you have a SH3-DSP SH7710 CPU. 106 107comment "SH-4 Processor Support" 108 109config CPU_SUBTYPE_SH7750 110 bool "Support SH7750 processor" 111 select CPU_SH4 112 select CPU_HAS_IPR_IRQ 113 help 114 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 115 116config CPU_SUBTYPE_SH7091 117 bool "Support SH7091 processor" 118 select CPU_SH4 119 select CPU_SUBTYPE_SH7750 120 help 121 Select SH7091 if you have an SH-4 based Sega device (such as 122 the Dreamcast, Naomi, and Naomi 2). 123 124config CPU_SUBTYPE_SH7750R 125 bool "Support SH7750R processor" 126 select CPU_SH4 127 select CPU_SUBTYPE_SH7750 128 select CPU_HAS_IPR_IRQ 129 130config CPU_SUBTYPE_SH7750S 131 bool "Support SH7750S processor" 132 select CPU_SH4 133 select CPU_SUBTYPE_SH7750 134 select CPU_HAS_IPR_IRQ 135 136config CPU_SUBTYPE_SH7751 137 bool "Support SH7751 processor" 138 select CPU_SH4 139 select CPU_HAS_IPR_IRQ 140 help 141 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 142 or if you have a HD6417751R CPU. 143 144config CPU_SUBTYPE_SH7751R 145 bool "Support SH7751R processor" 146 select CPU_SH4 147 select CPU_SUBTYPE_SH7751 148 select CPU_HAS_IPR_IRQ 149 150config CPU_SUBTYPE_SH7760 151 bool "Support SH7760 processor" 152 select CPU_SH4 153 select CPU_HAS_INTC2_IRQ 154 155config CPU_SUBTYPE_SH4_202 156 bool "Support SH4-202 processor" 157 select CPU_SH4 158 159comment "ST40 Processor Support" 160 161config CPU_SUBTYPE_ST40STB1 162 bool "Support ST40STB1/ST40RA processors" 163 select CPU_SUBTYPE_ST40 164 help 165 Select ST40STB1 if you have a ST40RA CPU. 166 This was previously called the ST40STB1, hence the option name. 167 168config CPU_SUBTYPE_ST40GX1 169 bool "Support ST40GX1 processor" 170 select CPU_SUBTYPE_ST40 171 help 172 Select ST40GX1 if you have a ST40GX1 CPU. 173 174comment "SH-4A Processor Support" 175 176config CPU_SUBTYPE_SH7770 177 bool "Support SH7770 processor" 178 select CPU_SH4A 179 180config CPU_SUBTYPE_SH7780 181 bool "Support SH7780 processor" 182 select CPU_SH4A 183 select CPU_HAS_INTC2_IRQ 184 185config CPU_SUBTYPE_SH7785 186 bool "Support SH7785 processor" 187 select CPU_SH4A 188 select CPU_SHX2 189 select CPU_HAS_INTC2_IRQ 190 191comment "SH4AL-DSP Processor Support" 192 193config CPU_SUBTYPE_SH73180 194 bool "Support SH73180 processor" 195 select CPU_SH4AL_DSP 196 197config CPU_SUBTYPE_SH7343 198 bool "Support SH7343 processor" 199 select CPU_SH4AL_DSP 200 201config CPU_SUBTYPE_SH7722 202 bool "Support SH7722 processor" 203 select CPU_SH4AL_DSP 204 select CPU_SHX2 205 select CPU_HAS_IPR_IRQ 206 207endmenu 208 209menu "Memory management options" 210 211config MMU 212 bool "Support for memory management hardware" 213 depends on !CPU_SH2 214 default y 215 help 216 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 217 boot on these systems, this option must not be set. 218 219 On other systems (such as the SH-3 and 4) where an MMU exists, 220 turning this off will boot the kernel on these machines with the 221 MMU implicitly switched off. 222 223config PAGE_OFFSET 224 hex 225 default "0x80000000" if MMU 226 default "0x00000000" 227 228config MEMORY_START 229 hex "Physical memory start address" 230 default "0x08000000" 231 ---help--- 232 Computers built with Hitachi SuperH processors always 233 map the ROM starting at address zero. But the processor 234 does not specify the range that RAM takes. 235 236 The physical memory (RAM) start address will be automatically 237 set to 08000000. Other platforms, such as the Solution Engine 238 boards typically map RAM at 0C000000. 239 240 Tweak this only when porting to a new machine which does not 241 already have a defconfig. Changing it from the known correct 242 value on any of the known systems will only lead to disaster. 243 244config MEMORY_SIZE 245 hex "Physical memory size" 246 default "0x00400000" 247 help 248 This sets the default memory size assumed by your SH kernel. It can 249 be overridden as normal by the 'mem=' argument on the kernel command 250 line. If unsure, consult your board specifications or just leave it 251 as 0x00400000 which was the default value before this became 252 configurable. 253 254config 32BIT 255 bool "Support 32-bit physical addressing through PMB" 256 depends on CPU_SH4A && MMU && (!X2TLB || BROKEN) 257 default y 258 help 259 If you say Y here, physical addressing will be extended to 260 32-bits through the SH-4A PMB. If this is not set, legacy 261 29-bit physical addressing will be used. 262 263config X2TLB 264 bool "Enable extended TLB mode" 265 depends on CPU_SHX2 && MMU && EXPERIMENTAL 266 help 267 Selecting this option will enable the extended mode of the SH-X2 268 TLB. For legacy SH-X behaviour and interoperability, say N. For 269 all of the fun new features and a willingless to submit bug reports, 270 say Y. 271 272config VSYSCALL 273 bool "Support vsyscall page" 274 depends on MMU 275 default y 276 help 277 This will enable support for the kernel mapping a vDSO page 278 in process space, and subsequently handing down the entry point 279 to the libc through the ELF auxiliary vector. 280 281 From the kernel side this is used for the signal trampoline. 282 For systems with an MMU that can afford to give up a page, 283 (the default value) say Y. 284 285choice 286 prompt "Kernel page size" 287 default PAGE_SIZE_4KB 288 289config PAGE_SIZE_4KB 290 bool "4kB" 291 help 292 This is the default page size used by all SuperH CPUs. 293 294config PAGE_SIZE_8KB 295 bool "8kB" 296 depends on EXPERIMENTAL && X2TLB 297 help 298 This enables 8kB pages as supported by SH-X2 and later MMUs. 299 300config PAGE_SIZE_64KB 301 bool "64kB" 302 depends on EXPERIMENTAL && CPU_SH4 303 help 304 This enables support for 64kB pages, possible on all SH-4 305 CPUs and later. Highly experimental, not recommended. 306 307endchoice 308 309choice 310 prompt "HugeTLB page size" 311 depends on HUGETLB_PAGE && CPU_SH4 && MMU 312 default HUGETLB_PAGE_SIZE_64K 313 314config HUGETLB_PAGE_SIZE_64K 315 bool "64kB" 316 317config HUGETLB_PAGE_SIZE_256K 318 bool "256kB" 319 depends on X2TLB 320 321config HUGETLB_PAGE_SIZE_1MB 322 bool "1MB" 323 324config HUGETLB_PAGE_SIZE_4MB 325 bool "4MB" 326 depends on X2TLB 327 328config HUGETLB_PAGE_SIZE_64MB 329 bool "64MB" 330 depends on X2TLB 331 332endchoice 333 334source "mm/Kconfig" 335 336endmenu 337 338menu "Cache configuration" 339 340config SH7705_CACHE_32KB 341 bool "Enable 32KB cache size for SH7705" 342 depends on CPU_SUBTYPE_SH7705 343 default y 344 345config SH_DIRECT_MAPPED 346 bool "Use direct-mapped caching" 347 default n 348 help 349 Selecting this option will configure the caches to be direct-mapped, 350 even if the cache supports a 2 or 4-way mode. This is useful primarily 351 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R, 352 SH4-202, SH4-501, etc.) 353 354 Turn this option off for platforms that do not have a direct-mapped 355 cache, and you have no need to run the caches in such a configuration. 356 357config SH_WRITETHROUGH 358 bool "Use write-through caching" 359 help 360 Selecting this option will configure the caches in write-through 361 mode, as opposed to the default write-back configuration. 362 363 Since there's sill some aliasing issues on SH-4, this option will 364 unfortunately still require the majority of flushing functions to 365 be implemented to deal with aliasing. 366 367 If unsure, say N. 368 369config SH_OCRAM 370 bool "Operand Cache RAM (OCRAM) support" 371 help 372 Selecting this option will automatically tear down the number of 373 sets in the dcache by half, which in turn exposes a memory range. 374 375 The addresses for the OC RAM base will vary according to the 376 processor version. Consult vendor documentation for specifics. 377 378 If unsure, say N. 379 380endmenu 381