1menu "Processor selection" 2 3# 4# Processor families 5# 6config CPU_SH2 7 bool 8 select SH_WRITETHROUGH 9 10config CPU_SH3 11 bool 12 select CPU_HAS_INTEVT 13 select CPU_HAS_SR_RB 14 15config CPU_SH4 16 bool 17 select CPU_HAS_INTEVT 18 select CPU_HAS_SR_RB 19 20config CPU_SH4A 21 bool 22 select CPU_SH4 23 24config CPU_SH4AL_DSP 25 bool 26 select CPU_SH4A 27 28config CPU_SUBTYPE_ST40 29 bool 30 select CPU_SH4 31 select CPU_HAS_INTC2_IRQ 32 33# 34# Processor subtypes 35# 36 37comment "SH-2 Processor Support" 38 39config CPU_SUBTYPE_SH7604 40 bool "Support SH7604 processor" 41 select CPU_SH2 42 43comment "SH-3 Processor Support" 44 45config CPU_SUBTYPE_SH7300 46 bool "Support SH7300 processor" 47 select CPU_SH3 48 49config CPU_SUBTYPE_SH7705 50 bool "Support SH7705 processor" 51 select CPU_SH3 52 select CPU_HAS_PINT_IRQ 53 54config CPU_SUBTYPE_SH7706 55 bool "Support SH7706 processor" 56 select CPU_SH3 57 help 58 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 59 60config CPU_SUBTYPE_SH7707 61 bool "Support SH7707 processor" 62 select CPU_SH3 63 select CPU_HAS_PINT_IRQ 64 help 65 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 66 67config CPU_SUBTYPE_SH7708 68 bool "Support SH7708 processor" 69 select CPU_SH3 70 help 71 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 72 if you have a 100 Mhz SH-3 HD6417708R CPU. 73 74config CPU_SUBTYPE_SH7709 75 bool "Support SH7709 processor" 76 select CPU_SH3 77 select CPU_HAS_PINT_IRQ 78 help 79 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 80 81config CPU_SUBTYPE_SH7710 82 bool "Support SH7710 processor" 83 select CPU_SH3 84 help 85 Select SH7710 if you have a SH3-DSP SH7710 CPU. 86 87comment "SH-4 Processor Support" 88 89config CPU_SUBTYPE_SH7750 90 bool "Support SH7750 processor" 91 select CPU_SH4 92 help 93 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 94 95config CPU_SUBTYPE_SH7091 96 bool "Support SH7091 processor" 97 select CPU_SH4 98 select CPU_SUBTYPE_SH7750 99 help 100 Select SH7091 if you have an SH-4 based Sega device (such as 101 the Dreamcast, Naomi, and Naomi 2). 102 103config CPU_SUBTYPE_SH7750R 104 bool "Support SH7750R processor" 105 select CPU_SH4 106 select CPU_SUBTYPE_SH7750 107 108config CPU_SUBTYPE_SH7750S 109 bool "Support SH7750S processor" 110 select CPU_SH4 111 select CPU_SUBTYPE_SH7750 112 113config CPU_SUBTYPE_SH7751 114 bool "Support SH7751 processor" 115 select CPU_SH4 116 help 117 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 118 or if you have a HD6417751R CPU. 119 120config CPU_SUBTYPE_SH7751R 121 bool "Support SH7751R processor" 122 select CPU_SH4 123 select CPU_SUBTYPE_SH7751 124 125config CPU_SUBTYPE_SH7760 126 bool "Support SH7760 processor" 127 select CPU_SH4 128 select CPU_HAS_INTC2_IRQ 129 130config CPU_SUBTYPE_SH4_202 131 bool "Support SH4-202 processor" 132 select CPU_SH4 133 134comment "ST40 Processor Support" 135 136config CPU_SUBTYPE_ST40STB1 137 bool "Support ST40STB1/ST40RA processors" 138 select CPU_SUBTYPE_ST40 139 help 140 Select ST40STB1 if you have a ST40RA CPU. 141 This was previously called the ST40STB1, hence the option name. 142 143config CPU_SUBTYPE_ST40GX1 144 bool "Support ST40GX1 processor" 145 select CPU_SUBTYPE_ST40 146 help 147 Select ST40GX1 if you have a ST40GX1 CPU. 148 149comment "SH-4A Processor Support" 150 151config CPU_SUBTYPE_SH7770 152 bool "Support SH7770 processor" 153 select CPU_SH4A 154 155config CPU_SUBTYPE_SH7780 156 bool "Support SH7780 processor" 157 select CPU_SH4A 158 select CPU_HAS_INTC2_IRQ 159 160comment "SH4AL-DSP Processor Support" 161 162config CPU_SUBTYPE_SH73180 163 bool "Support SH73180 processor" 164 select CPU_SH4AL_DSP 165 166config CPU_SUBTYPE_SH7343 167 bool "Support SH7343 processor" 168 select CPU_SH4AL_DSP 169 170endmenu 171 172menu "Memory management options" 173 174config MMU 175 bool "Support for memory management hardware" 176 depends on !CPU_SH2 177 default y 178 help 179 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 180 boot on these systems, this option must not be set. 181 182 On other systems (such as the SH-3 and 4) where an MMU exists, 183 turning this off will boot the kernel on these machines with the 184 MMU implicitly switched off. 185 186config PAGE_OFFSET 187 hex 188 default "0x80000000" if MMU 189 default "0x00000000" 190 191config MEMORY_START 192 hex "Physical memory start address" 193 default "0x08000000" 194 ---help--- 195 Computers built with Hitachi SuperH processors always 196 map the ROM starting at address zero. But the processor 197 does not specify the range that RAM takes. 198 199 The physical memory (RAM) start address will be automatically 200 set to 08000000. Other platforms, such as the Solution Engine 201 boards typically map RAM at 0C000000. 202 203 Tweak this only when porting to a new machine which does not 204 already have a defconfig. Changing it from the known correct 205 value on any of the known systems will only lead to disaster. 206 207config MEMORY_SIZE 208 hex "Physical memory size" 209 default "0x00400000" 210 help 211 This sets the default memory size assumed by your SH kernel. It can 212 be overridden as normal by the 'mem=' argument on the kernel command 213 line. If unsure, consult your board specifications or just leave it 214 as 0x00400000 which was the default value before this became 215 configurable. 216 217config 32BIT 218 bool "Support 32-bit physical addressing through PMB" 219 depends on CPU_SH4A && MMU 220 default y 221 help 222 If you say Y here, physical addressing will be extended to 223 32-bits through the SH-4A PMB. If this is not set, legacy 224 29-bit physical addressing will be used. 225 226config VSYSCALL 227 bool "Support vsyscall page" 228 depends on MMU 229 default y 230 help 231 This will enable support for the kernel mapping a vDSO page 232 in process space, and subsequently handing down the entry point 233 to the libc through the ELF auxiliary vector. 234 235 From the kernel side this is used for the signal trampoline. 236 For systems with an MMU that can afford to give up a page, 237 (the default value) say Y. 238 239choice 240 prompt "HugeTLB page size" 241 depends on HUGETLB_PAGE && CPU_SH4 && MMU 242 default HUGETLB_PAGE_SIZE_64K 243 244config HUGETLB_PAGE_SIZE_64K 245 bool "64K" 246 247config HUGETLB_PAGE_SIZE_1MB 248 bool "1MB" 249 250endchoice 251 252source "mm/Kconfig" 253 254endmenu 255 256menu "Cache configuration" 257 258config SH7705_CACHE_32KB 259 bool "Enable 32KB cache size for SH7705" 260 depends on CPU_SUBTYPE_SH7705 261 default y 262 263config SH_DIRECT_MAPPED 264 bool "Use direct-mapped caching" 265 default n 266 help 267 Selecting this option will configure the caches to be direct-mapped, 268 even if the cache supports a 2 or 4-way mode. This is useful primarily 269 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R, 270 SH4-202, SH4-501, etc.) 271 272 Turn this option off for platforms that do not have a direct-mapped 273 cache, and you have no need to run the caches in such a configuration. 274 275config SH_WRITETHROUGH 276 bool "Use write-through caching" 277 default y if CPU_SH2 278 help 279 Selecting this option will configure the caches in write-through 280 mode, as opposed to the default write-back configuration. 281 282 Since there's sill some aliasing issues on SH-4, this option will 283 unfortunately still require the majority of flushing functions to 284 be implemented to deal with aliasing. 285 286 If unsure, say N. 287 288config SH_OCRAM 289 bool "Operand Cache RAM (OCRAM) support" 290 help 291 Selecting this option will automatically tear down the number of 292 sets in the dcache by half, which in turn exposes a memory range. 293 294 The addresses for the OC RAM base will vary according to the 295 processor version. Consult vendor documentation for specifics. 296 297 If unsure, say N. 298 299endmenu 300