1 /* 2 * 'traps.c' handles hardware traps and faults after we have saved some 3 * state in 'entry.S'. 4 * 5 * SuperH version: Copyright (C) 1999 Niibe Yutaka 6 * Copyright (C) 2000 Philipp Rumpf 7 * Copyright (C) 2000 David Howells 8 * Copyright (C) 2002 - 2007 Paul Mundt 9 * 10 * This file is subject to the terms and conditions of the GNU General Public 11 * License. See the file "COPYING" in the main directory of this archive 12 * for more details. 13 */ 14 #include <linux/kernel.h> 15 #include <linux/ptrace.h> 16 #include <linux/hardirq.h> 17 #include <linux/init.h> 18 #include <linux/spinlock.h> 19 #include <linux/module.h> 20 #include <linux/kallsyms.h> 21 #include <linux/io.h> 22 #include <linux/bug.h> 23 #include <linux/debug_locks.h> 24 #include <linux/kdebug.h> 25 #include <linux/kexec.h> 26 #include <linux/limits.h> 27 #include <linux/proc_fs.h> 28 #include <linux/seq_file.h> 29 #include <linux/sysfs.h> 30 #include <asm/system.h> 31 #include <asm/uaccess.h> 32 #include <asm/fpu.h> 33 #include <asm/kprobes.h> 34 35 #ifdef CONFIG_CPU_SH2 36 # define TRAP_RESERVED_INST 4 37 # define TRAP_ILLEGAL_SLOT_INST 6 38 # define TRAP_ADDRESS_ERROR 9 39 # ifdef CONFIG_CPU_SH2A 40 # define TRAP_UBC 12 41 # define TRAP_FPU_ERROR 13 42 # define TRAP_DIVZERO_ERROR 17 43 # define TRAP_DIVOVF_ERROR 18 44 # endif 45 #else 46 #define TRAP_RESERVED_INST 12 47 #define TRAP_ILLEGAL_SLOT_INST 13 48 #endif 49 50 static unsigned long se_user; 51 static unsigned long se_sys; 52 static unsigned long se_half; 53 static unsigned long se_word; 54 static unsigned long se_dword; 55 static unsigned long se_multi; 56 /* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not 57 valid! */ 58 static int se_usermode = 3; 59 /* 0: no warning 1: print a warning message, disabled by default */ 60 static int se_kernmode_warn; 61 62 #ifdef CONFIG_PROC_FS 63 static const char *se_usermode_action[] = { 64 "ignored", 65 "warn", 66 "fixup", 67 "fixup+warn", 68 "signal", 69 "signal+warn" 70 }; 71 72 static int alignment_proc_show(struct seq_file *m, void *v) 73 { 74 seq_printf(m, "User:\t\t%lu\n", se_user); 75 seq_printf(m, "System:\t\t%lu\n", se_sys); 76 seq_printf(m, "Half:\t\t%lu\n", se_half); 77 seq_printf(m, "Word:\t\t%lu\n", se_word); 78 seq_printf(m, "DWord:\t\t%lu\n", se_dword); 79 seq_printf(m, "Multi:\t\t%lu\n", se_multi); 80 seq_printf(m, "User faults:\t%i (%s)\n", se_usermode, 81 se_usermode_action[se_usermode]); 82 seq_printf(m, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn, 83 se_kernmode_warn ? "+warn" : ""); 84 return 0; 85 } 86 87 static int alignment_proc_open(struct inode *inode, struct file *file) 88 { 89 return single_open(file, alignment_proc_show, NULL); 90 } 91 92 static ssize_t alignment_proc_write(struct file *file, 93 const char __user *buffer, size_t count, loff_t *pos) 94 { 95 int *data = PDE(file->f_path.dentry->d_inode)->data; 96 char mode; 97 98 if (count > 0) { 99 if (get_user(mode, buffer)) 100 return -EFAULT; 101 if (mode >= '0' && mode <= '5') 102 *data = mode - '0'; 103 } 104 return count; 105 } 106 107 static const struct file_operations alignment_proc_fops = { 108 .owner = THIS_MODULE, 109 .open = alignment_proc_open, 110 .read = seq_read, 111 .llseek = seq_lseek, 112 .release = single_release, 113 .write = alignment_proc_write, 114 }; 115 #endif 116 117 static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 118 { 119 unsigned long p; 120 int i; 121 122 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top); 123 124 for (p = bottom & ~31; p < top; ) { 125 printk("%04lx: ", p & 0xffff); 126 127 for (i = 0; i < 8; i++, p += 4) { 128 unsigned int val; 129 130 if (p < bottom || p >= top) 131 printk(" "); 132 else { 133 if (__get_user(val, (unsigned int __user *)p)) { 134 printk("\n"); 135 return; 136 } 137 printk("%08x ", val); 138 } 139 } 140 printk("\n"); 141 } 142 } 143 144 static DEFINE_SPINLOCK(die_lock); 145 146 void die(const char * str, struct pt_regs * regs, long err) 147 { 148 static int die_counter; 149 150 oops_enter(); 151 152 spin_lock_irq(&die_lock); 153 console_verbose(); 154 bust_spinlocks(1); 155 156 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); 157 sysfs_printk_last_file(); 158 print_modules(); 159 show_regs(regs); 160 161 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm, 162 task_pid_nr(current), task_stack_page(current) + 1); 163 164 if (!user_mode(regs) || in_interrupt()) 165 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE + 166 (unsigned long)task_stack_page(current)); 167 168 notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV); 169 170 bust_spinlocks(0); 171 add_taint(TAINT_DIE); 172 spin_unlock_irq(&die_lock); 173 oops_exit(); 174 175 if (kexec_should_crash(current)) 176 crash_kexec(regs); 177 178 if (in_interrupt()) 179 panic("Fatal exception in interrupt"); 180 181 if (panic_on_oops) 182 panic("Fatal exception"); 183 184 do_exit(SIGSEGV); 185 } 186 187 static inline void die_if_kernel(const char *str, struct pt_regs *regs, 188 long err) 189 { 190 if (!user_mode(regs)) 191 die(str, regs, err); 192 } 193 194 /* 195 * try and fix up kernelspace address errors 196 * - userspace errors just cause EFAULT to be returned, resulting in SEGV 197 * - kernel/userspace interfaces cause a jump to an appropriate handler 198 * - other kernel errors are bad 199 */ 200 static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err) 201 { 202 if (!user_mode(regs)) { 203 const struct exception_table_entry *fixup; 204 fixup = search_exception_tables(regs->pc); 205 if (fixup) { 206 regs->pc = fixup->fixup; 207 return; 208 } 209 210 die(str, regs, err); 211 } 212 } 213 214 static inline void sign_extend(unsigned int count, unsigned char *dst) 215 { 216 #ifdef __LITTLE_ENDIAN__ 217 if ((count == 1) && dst[0] & 0x80) { 218 dst[1] = 0xff; 219 dst[2] = 0xff; 220 dst[3] = 0xff; 221 } 222 if ((count == 2) && dst[1] & 0x80) { 223 dst[2] = 0xff; 224 dst[3] = 0xff; 225 } 226 #else 227 if ((count == 1) && dst[3] & 0x80) { 228 dst[2] = 0xff; 229 dst[1] = 0xff; 230 dst[0] = 0xff; 231 } 232 if ((count == 2) && dst[2] & 0x80) { 233 dst[1] = 0xff; 234 dst[0] = 0xff; 235 } 236 #endif 237 } 238 239 static struct mem_access user_mem_access = { 240 copy_from_user, 241 copy_to_user, 242 }; 243 244 /* 245 * handle an instruction that does an unaligned memory access by emulating the 246 * desired behaviour 247 * - note that PC _may not_ point to the faulting instruction 248 * (if that instruction is in a branch delay slot) 249 * - return 0 if emulation okay, -EFAULT on existential error 250 */ 251 static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs, 252 struct mem_access *ma) 253 { 254 int ret, index, count; 255 unsigned long *rm, *rn; 256 unsigned char *src, *dst; 257 unsigned char __user *srcu, *dstu; 258 259 index = (instruction>>8)&15; /* 0x0F00 */ 260 rn = ®s->regs[index]; 261 262 index = (instruction>>4)&15; /* 0x00F0 */ 263 rm = ®s->regs[index]; 264 265 count = 1<<(instruction&3); 266 267 switch (count) { 268 case 1: se_half += 1; break; 269 case 2: se_word += 1; break; 270 case 4: se_dword += 1; break; 271 case 8: se_multi += 1; break; /* ??? */ 272 } 273 274 ret = -EFAULT; 275 switch (instruction>>12) { 276 case 0: /* mov.[bwl] to/from memory via r0+rn */ 277 if (instruction & 8) { 278 /* from memory */ 279 srcu = (unsigned char __user *)*rm; 280 srcu += regs->regs[0]; 281 dst = (unsigned char *)rn; 282 *(unsigned long *)dst = 0; 283 284 #if !defined(__LITTLE_ENDIAN__) 285 dst += 4-count; 286 #endif 287 if (ma->from(dst, srcu, count)) 288 goto fetch_fault; 289 290 sign_extend(count, dst); 291 } else { 292 /* to memory */ 293 src = (unsigned char *)rm; 294 #if !defined(__LITTLE_ENDIAN__) 295 src += 4-count; 296 #endif 297 dstu = (unsigned char __user *)*rn; 298 dstu += regs->regs[0]; 299 300 if (ma->to(dstu, src, count)) 301 goto fetch_fault; 302 } 303 ret = 0; 304 break; 305 306 case 1: /* mov.l Rm,@(disp,Rn) */ 307 src = (unsigned char*) rm; 308 dstu = (unsigned char __user *)*rn; 309 dstu += (instruction&0x000F)<<2; 310 311 if (ma->to(dstu, src, 4)) 312 goto fetch_fault; 313 ret = 0; 314 break; 315 316 case 2: /* mov.[bwl] to memory, possibly with pre-decrement */ 317 if (instruction & 4) 318 *rn -= count; 319 src = (unsigned char*) rm; 320 dstu = (unsigned char __user *)*rn; 321 #if !defined(__LITTLE_ENDIAN__) 322 src += 4-count; 323 #endif 324 if (ma->to(dstu, src, count)) 325 goto fetch_fault; 326 ret = 0; 327 break; 328 329 case 5: /* mov.l @(disp,Rm),Rn */ 330 srcu = (unsigned char __user *)*rm; 331 srcu += (instruction & 0x000F) << 2; 332 dst = (unsigned char *)rn; 333 *(unsigned long *)dst = 0; 334 335 if (ma->from(dst, srcu, 4)) 336 goto fetch_fault; 337 ret = 0; 338 break; 339 340 case 6: /* mov.[bwl] from memory, possibly with post-increment */ 341 srcu = (unsigned char __user *)*rm; 342 if (instruction & 4) 343 *rm += count; 344 dst = (unsigned char*) rn; 345 *(unsigned long*)dst = 0; 346 347 #if !defined(__LITTLE_ENDIAN__) 348 dst += 4-count; 349 #endif 350 if (ma->from(dst, srcu, count)) 351 goto fetch_fault; 352 sign_extend(count, dst); 353 ret = 0; 354 break; 355 356 case 8: 357 switch ((instruction&0xFF00)>>8) { 358 case 0x81: /* mov.w R0,@(disp,Rn) */ 359 src = (unsigned char *) ®s->regs[0]; 360 #if !defined(__LITTLE_ENDIAN__) 361 src += 2; 362 #endif 363 dstu = (unsigned char __user *)*rm; /* called Rn in the spec */ 364 dstu += (instruction & 0x000F) << 1; 365 366 if (ma->to(dstu, src, 2)) 367 goto fetch_fault; 368 ret = 0; 369 break; 370 371 case 0x85: /* mov.w @(disp,Rm),R0 */ 372 srcu = (unsigned char __user *)*rm; 373 srcu += (instruction & 0x000F) << 1; 374 dst = (unsigned char *) ®s->regs[0]; 375 *(unsigned long *)dst = 0; 376 377 #if !defined(__LITTLE_ENDIAN__) 378 dst += 2; 379 #endif 380 if (ma->from(dst, srcu, 2)) 381 goto fetch_fault; 382 sign_extend(2, dst); 383 ret = 0; 384 break; 385 } 386 break; 387 } 388 return ret; 389 390 fetch_fault: 391 /* Argh. Address not only misaligned but also non-existent. 392 * Raise an EFAULT and see if it's trapped 393 */ 394 die_if_no_fixup("Fault in unaligned fixup", regs, 0); 395 return -EFAULT; 396 } 397 398 /* 399 * emulate the instruction in the delay slot 400 * - fetches the instruction from PC+2 401 */ 402 static inline int handle_delayslot(struct pt_regs *regs, 403 insn_size_t old_instruction, 404 struct mem_access *ma) 405 { 406 insn_size_t instruction; 407 void __user *addr = (void __user *)(regs->pc + 408 instruction_size(old_instruction)); 409 410 if (copy_from_user(&instruction, addr, sizeof(instruction))) { 411 /* the instruction-fetch faulted */ 412 if (user_mode(regs)) 413 return -EFAULT; 414 415 /* kernel */ 416 die("delay-slot-insn faulting in handle_unaligned_delayslot", 417 regs, 0); 418 } 419 420 return handle_unaligned_ins(instruction, regs, ma); 421 } 422 423 /* 424 * handle an instruction that does an unaligned memory access 425 * - have to be careful of branch delay-slot instructions that fault 426 * SH3: 427 * - if the branch would be taken PC points to the branch 428 * - if the branch would not be taken, PC points to delay-slot 429 * SH4: 430 * - PC always points to delayed branch 431 * - return 0 if handled, -EFAULT if failed (may not return if in kernel) 432 */ 433 434 /* Macros to determine offset from current PC for branch instructions */ 435 /* Explicit type coercion is used to force sign extension where needed */ 436 #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4) 437 #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4) 438 439 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, 440 struct mem_access *ma, int expected) 441 { 442 u_int rm; 443 int ret, index; 444 445 /* 446 * XXX: We can't handle mixed 16/32-bit instructions yet 447 */ 448 if (instruction_size(instruction) != 2) 449 return -EINVAL; 450 451 index = (instruction>>8)&15; /* 0x0F00 */ 452 rm = regs->regs[index]; 453 454 /* shout about fixups */ 455 if (!expected) { 456 if (user_mode(regs) && (se_usermode & 1) && printk_ratelimit()) 457 pr_notice("Fixing up unaligned userspace access " 458 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 459 current->comm, task_pid_nr(current), 460 (void *)regs->pc, instruction); 461 else if (se_kernmode_warn && printk_ratelimit()) 462 pr_notice("Fixing up unaligned kernel access " 463 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 464 current->comm, task_pid_nr(current), 465 (void *)regs->pc, instruction); 466 } 467 468 ret = -EFAULT; 469 switch (instruction&0xF000) { 470 case 0x0000: 471 if (instruction==0x000B) { 472 /* rts */ 473 ret = handle_delayslot(regs, instruction, ma); 474 if (ret==0) 475 regs->pc = regs->pr; 476 } 477 else if ((instruction&0x00FF)==0x0023) { 478 /* braf @Rm */ 479 ret = handle_delayslot(regs, instruction, ma); 480 if (ret==0) 481 regs->pc += rm + 4; 482 } 483 else if ((instruction&0x00FF)==0x0003) { 484 /* bsrf @Rm */ 485 ret = handle_delayslot(regs, instruction, ma); 486 if (ret==0) { 487 regs->pr = regs->pc + 4; 488 regs->pc += rm + 4; 489 } 490 } 491 else { 492 /* mov.[bwl] to/from memory via r0+rn */ 493 goto simple; 494 } 495 break; 496 497 case 0x1000: /* mov.l Rm,@(disp,Rn) */ 498 goto simple; 499 500 case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */ 501 goto simple; 502 503 case 0x4000: 504 if ((instruction&0x00FF)==0x002B) { 505 /* jmp @Rm */ 506 ret = handle_delayslot(regs, instruction, ma); 507 if (ret==0) 508 regs->pc = rm; 509 } 510 else if ((instruction&0x00FF)==0x000B) { 511 /* jsr @Rm */ 512 ret = handle_delayslot(regs, instruction, ma); 513 if (ret==0) { 514 regs->pr = regs->pc + 4; 515 regs->pc = rm; 516 } 517 } 518 else { 519 /* mov.[bwl] to/from memory via r0+rn */ 520 goto simple; 521 } 522 break; 523 524 case 0x5000: /* mov.l @(disp,Rm),Rn */ 525 goto simple; 526 527 case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */ 528 goto simple; 529 530 case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */ 531 switch (instruction&0x0F00) { 532 case 0x0100: /* mov.w R0,@(disp,Rm) */ 533 goto simple; 534 case 0x0500: /* mov.w @(disp,Rm),R0 */ 535 goto simple; 536 case 0x0B00: /* bf lab - no delayslot*/ 537 break; 538 case 0x0F00: /* bf/s lab */ 539 ret = handle_delayslot(regs, instruction, ma); 540 if (ret==0) { 541 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) 542 if ((regs->sr & 0x00000001) != 0) 543 regs->pc += 4; /* next after slot */ 544 else 545 #endif 546 regs->pc += SH_PC_8BIT_OFFSET(instruction); 547 } 548 break; 549 case 0x0900: /* bt lab - no delayslot */ 550 break; 551 case 0x0D00: /* bt/s lab */ 552 ret = handle_delayslot(regs, instruction, ma); 553 if (ret==0) { 554 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB) 555 if ((regs->sr & 0x00000001) == 0) 556 regs->pc += 4; /* next after slot */ 557 else 558 #endif 559 regs->pc += SH_PC_8BIT_OFFSET(instruction); 560 } 561 break; 562 } 563 break; 564 565 case 0xA000: /* bra label */ 566 ret = handle_delayslot(regs, instruction, ma); 567 if (ret==0) 568 regs->pc += SH_PC_12BIT_OFFSET(instruction); 569 break; 570 571 case 0xB000: /* bsr label */ 572 ret = handle_delayslot(regs, instruction, ma); 573 if (ret==0) { 574 regs->pr = regs->pc + 4; 575 regs->pc += SH_PC_12BIT_OFFSET(instruction); 576 } 577 break; 578 } 579 return ret; 580 581 /* handle non-delay-slot instruction */ 582 simple: 583 ret = handle_unaligned_ins(instruction, regs, ma); 584 if (ret==0) 585 regs->pc += instruction_size(instruction); 586 return ret; 587 } 588 589 /* 590 * Handle various address error exceptions: 591 * - instruction address error: 592 * misaligned PC 593 * PC >= 0x80000000 in user mode 594 * - data address error (read and write) 595 * misaligned data access 596 * access to >= 0x80000000 is user mode 597 * Unfortuntaly we can't distinguish between instruction address error 598 * and data address errors caused by read accesses. 599 */ 600 asmlinkage void do_address_error(struct pt_regs *regs, 601 unsigned long writeaccess, 602 unsigned long address) 603 { 604 unsigned long error_code = 0; 605 mm_segment_t oldfs; 606 siginfo_t info; 607 insn_size_t instruction; 608 int tmp; 609 610 /* Intentional ifdef */ 611 #ifdef CONFIG_CPU_HAS_SR_RB 612 error_code = lookup_exception_vector(); 613 #endif 614 615 oldfs = get_fs(); 616 617 if (user_mode(regs)) { 618 int si_code = BUS_ADRERR; 619 620 local_irq_enable(); 621 622 se_user += 1; 623 624 set_fs(USER_DS); 625 if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1), 626 sizeof(instruction))) { 627 set_fs(oldfs); 628 goto uspace_segv; 629 } 630 set_fs(oldfs); 631 632 /* shout about userspace fixups */ 633 if (se_usermode & 1) 634 printk(KERN_NOTICE "Unaligned userspace access " 635 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 636 current->comm, current->pid, (void *)regs->pc, 637 instruction); 638 639 if (se_usermode & 2) 640 goto fixup; 641 642 if (se_usermode & 4) 643 goto uspace_segv; 644 else { 645 /* ignore */ 646 regs->pc += instruction_size(instruction); 647 return; 648 } 649 650 fixup: 651 /* bad PC is not something we can fix */ 652 if (regs->pc & 1) { 653 si_code = BUS_ADRALN; 654 goto uspace_segv; 655 } 656 657 set_fs(USER_DS); 658 tmp = handle_unaligned_access(instruction, regs, 659 &user_mem_access, 0); 660 set_fs(oldfs); 661 662 if (tmp==0) 663 return; /* sorted */ 664 uspace_segv: 665 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned " 666 "access (PC %lx PR %lx)\n", current->comm, regs->pc, 667 regs->pr); 668 669 info.si_signo = SIGBUS; 670 info.si_errno = 0; 671 info.si_code = si_code; 672 info.si_addr = (void __user *)address; 673 force_sig_info(SIGBUS, &info, current); 674 } else { 675 se_sys += 1; 676 677 if (regs->pc & 1) 678 die("unaligned program counter", regs, error_code); 679 680 set_fs(KERNEL_DS); 681 if (copy_from_user(&instruction, (void __user *)(regs->pc), 682 sizeof(instruction))) { 683 /* Argh. Fault on the instruction itself. 684 This should never happen non-SMP 685 */ 686 set_fs(oldfs); 687 die("insn faulting in do_address_error", regs, 0); 688 } 689 690 if (se_kernmode_warn) 691 printk(KERN_NOTICE "Unaligned kernel access " 692 "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 693 current->comm, current->pid, (void *)regs->pc, 694 instruction); 695 696 handle_unaligned_access(instruction, regs, 697 &user_mem_access, 0); 698 set_fs(oldfs); 699 } 700 } 701 702 #ifdef CONFIG_SH_DSP 703 /* 704 * SH-DSP support gerg@snapgear.com. 705 */ 706 int is_dsp_inst(struct pt_regs *regs) 707 { 708 unsigned short inst = 0; 709 710 /* 711 * Safe guard if DSP mode is already enabled or we're lacking 712 * the DSP altogether. 713 */ 714 if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP)) 715 return 0; 716 717 get_user(inst, ((unsigned short *) regs->pc)); 718 719 inst &= 0xf000; 720 721 /* Check for any type of DSP or support instruction */ 722 if ((inst == 0xf000) || (inst == 0x4000)) 723 return 1; 724 725 return 0; 726 } 727 #else 728 #define is_dsp_inst(regs) (0) 729 #endif /* CONFIG_SH_DSP */ 730 731 #ifdef CONFIG_CPU_SH2A 732 asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, 733 unsigned long r6, unsigned long r7, 734 struct pt_regs __regs) 735 { 736 siginfo_t info; 737 738 switch (r4) { 739 case TRAP_DIVZERO_ERROR: 740 info.si_code = FPE_INTDIV; 741 break; 742 case TRAP_DIVOVF_ERROR: 743 info.si_code = FPE_INTOVF; 744 break; 745 } 746 747 force_sig_info(SIGFPE, &info, current); 748 } 749 #endif 750 751 asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, 752 unsigned long r6, unsigned long r7, 753 struct pt_regs __regs) 754 { 755 struct pt_regs *regs = RELOC_HIDE(&__regs, 0); 756 unsigned long error_code; 757 struct task_struct *tsk = current; 758 759 #ifdef CONFIG_SH_FPU_EMU 760 unsigned short inst = 0; 761 int err; 762 763 get_user(inst, (unsigned short*)regs->pc); 764 765 err = do_fpu_inst(inst, regs); 766 if (!err) { 767 regs->pc += instruction_size(inst); 768 return; 769 } 770 /* not a FPU inst. */ 771 #endif 772 773 #ifdef CONFIG_SH_DSP 774 /* Check if it's a DSP instruction */ 775 if (is_dsp_inst(regs)) { 776 /* Enable DSP mode, and restart instruction. */ 777 regs->sr |= SR_DSP; 778 /* Save DSP mode */ 779 tsk->thread.dsp_status.status |= SR_DSP; 780 return; 781 } 782 #endif 783 784 error_code = lookup_exception_vector(); 785 786 local_irq_enable(); 787 force_sig(SIGILL, tsk); 788 die_if_no_fixup("reserved instruction", regs, error_code); 789 } 790 791 #ifdef CONFIG_SH_FPU_EMU 792 static int emulate_branch(unsigned short inst, struct pt_regs *regs) 793 { 794 /* 795 * bfs: 8fxx: PC+=d*2+4; 796 * bts: 8dxx: PC+=d*2+4; 797 * bra: axxx: PC+=D*2+4; 798 * bsr: bxxx: PC+=D*2+4 after PR=PC+4; 799 * braf:0x23: PC+=Rn*2+4; 800 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4; 801 * jmp: 4x2b: PC=Rn; 802 * jsr: 4x0b: PC=Rn after PR=PC+4; 803 * rts: 000b: PC=PR; 804 */ 805 if (((inst & 0xf000) == 0xb000) || /* bsr */ 806 ((inst & 0xf0ff) == 0x0003) || /* bsrf */ 807 ((inst & 0xf0ff) == 0x400b)) /* jsr */ 808 regs->pr = regs->pc + 4; 809 810 if ((inst & 0xfd00) == 0x8d00) { /* bfs, bts */ 811 regs->pc += SH_PC_8BIT_OFFSET(inst); 812 return 0; 813 } 814 815 if ((inst & 0xe000) == 0xa000) { /* bra, bsr */ 816 regs->pc += SH_PC_12BIT_OFFSET(inst); 817 return 0; 818 } 819 820 if ((inst & 0xf0df) == 0x0003) { /* braf, bsrf */ 821 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4; 822 return 0; 823 } 824 825 if ((inst & 0xf0df) == 0x400b) { /* jmp, jsr */ 826 regs->pc = regs->regs[(inst & 0x0f00) >> 8]; 827 return 0; 828 } 829 830 if ((inst & 0xffff) == 0x000b) { /* rts */ 831 regs->pc = regs->pr; 832 return 0; 833 } 834 835 return 1; 836 } 837 #endif 838 839 asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, 840 unsigned long r6, unsigned long r7, 841 struct pt_regs __regs) 842 { 843 struct pt_regs *regs = RELOC_HIDE(&__regs, 0); 844 unsigned long inst; 845 struct task_struct *tsk = current; 846 847 if (kprobe_handle_illslot(regs->pc) == 0) 848 return; 849 850 #ifdef CONFIG_SH_FPU_EMU 851 get_user(inst, (unsigned short *)regs->pc + 1); 852 if (!do_fpu_inst(inst, regs)) { 853 get_user(inst, (unsigned short *)regs->pc); 854 if (!emulate_branch(inst, regs)) 855 return; 856 /* fault in branch.*/ 857 } 858 /* not a FPU inst. */ 859 #endif 860 861 inst = lookup_exception_vector(); 862 863 local_irq_enable(); 864 force_sig(SIGILL, tsk); 865 die_if_no_fixup("illegal slot instruction", regs, inst); 866 } 867 868 asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, 869 unsigned long r6, unsigned long r7, 870 struct pt_regs __regs) 871 { 872 struct pt_regs *regs = RELOC_HIDE(&__regs, 0); 873 long ex; 874 875 ex = lookup_exception_vector(); 876 die_if_kernel("exception", regs, ex); 877 } 878 879 #if defined(CONFIG_SH_STANDARD_BIOS) 880 void *gdb_vbr_vector; 881 882 static inline void __init gdb_vbr_init(void) 883 { 884 register unsigned long vbr; 885 886 /* 887 * Read the old value of the VBR register to initialise 888 * the vector through which debug and BIOS traps are 889 * delegated by the Linux trap handler. 890 */ 891 asm volatile("stc vbr, %0" : "=r" (vbr)); 892 893 gdb_vbr_vector = (void *)(vbr + 0x100); 894 printk("Setting GDB trap vector to 0x%08lx\n", 895 (unsigned long)gdb_vbr_vector); 896 } 897 #endif 898 899 void __cpuinit per_cpu_trap_init(void) 900 { 901 extern void *vbr_base; 902 903 #ifdef CONFIG_SH_STANDARD_BIOS 904 if (raw_smp_processor_id() == 0) 905 gdb_vbr_init(); 906 #endif 907 908 /* NOTE: The VBR value should be at P1 909 (or P2, virtural "fixed" address space). 910 It's definitely should not in physical address. */ 911 912 asm volatile("ldc %0, vbr" 913 : /* no output */ 914 : "r" (&vbr_base) 915 : "memory"); 916 } 917 918 void *set_exception_table_vec(unsigned int vec, void *handler) 919 { 920 extern void *exception_handling_table[]; 921 void *old_handler; 922 923 old_handler = exception_handling_table[vec]; 924 exception_handling_table[vec] = handler; 925 return old_handler; 926 } 927 928 void __init trap_init(void) 929 { 930 set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst); 931 set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst); 932 933 #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \ 934 defined(CONFIG_SH_FPU_EMU) 935 /* 936 * For SH-4 lacking an FPU, treat floating point instructions as 937 * reserved. They'll be handled in the math-emu case, or faulted on 938 * otherwise. 939 */ 940 set_exception_table_evt(0x800, do_reserved_inst); 941 set_exception_table_evt(0x820, do_illegal_slot_inst); 942 #elif defined(CONFIG_SH_FPU) 943 set_exception_table_evt(0x800, fpu_state_restore_trap_handler); 944 set_exception_table_evt(0x820, fpu_state_restore_trap_handler); 945 #endif 946 947 #ifdef CONFIG_CPU_SH2 948 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler); 949 #endif 950 #ifdef CONFIG_CPU_SH2A 951 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error); 952 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error); 953 #ifdef CONFIG_SH_FPU 954 set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler); 955 #endif 956 #endif 957 958 #ifdef TRAP_UBC 959 set_exception_table_vec(TRAP_UBC, break_point_trap); 960 #endif 961 962 /* Setup VBR for boot cpu */ 963 per_cpu_trap_init(); 964 } 965 966 void show_stack(struct task_struct *tsk, unsigned long *sp) 967 { 968 unsigned long stack; 969 970 if (!tsk) 971 tsk = current; 972 if (tsk == current) 973 sp = (unsigned long *)current_stack_pointer; 974 else 975 sp = (unsigned long *)tsk->thread.sp; 976 977 stack = (unsigned long)sp; 978 dump_mem("Stack: ", stack, THREAD_SIZE + 979 (unsigned long)task_stack_page(tsk)); 980 show_trace(tsk, sp, NULL); 981 } 982 983 void dump_stack(void) 984 { 985 show_stack(NULL, NULL); 986 } 987 EXPORT_SYMBOL(dump_stack); 988 989 #ifdef CONFIG_PROC_FS 990 /* 991 * This needs to be done after sysctl_init, otherwise sys/ will be 992 * overwritten. Actually, this shouldn't be in sys/ at all since 993 * it isn't a sysctl, and it doesn't contain sysctl information. 994 * We now locate it in /proc/cpu/alignment instead. 995 */ 996 static int __init alignment_init(void) 997 { 998 struct proc_dir_entry *dir, *res; 999 1000 dir = proc_mkdir("cpu", NULL); 1001 if (!dir) 1002 return -ENOMEM; 1003 1004 res = proc_create_data("alignment", S_IWUSR | S_IRUGO, dir, 1005 &alignment_proc_fops, &se_usermode); 1006 if (!res) 1007 return -ENOMEM; 1008 1009 res = proc_create_data("kernel_alignment", S_IWUSR | S_IRUGO, dir, 1010 &alignment_proc_fops, &se_kernmode_warn); 1011 if (!res) 1012 return -ENOMEM; 1013 1014 return 0; 1015 } 1016 1017 fs_initcall(alignment_init); 1018 #endif 1019