1e9edb3feSPaul Mundt /* 27426394fSMagnus Damm * arch/sh/kernel/cpu/shmobile/pm.c 3e9edb3feSPaul Mundt * 4e9edb3feSPaul Mundt * Power management support code for SuperH Mobile 5e9edb3feSPaul Mundt * 6e9edb3feSPaul Mundt * Copyright (C) 2009 Magnus Damm 7e9edb3feSPaul Mundt * 8e9edb3feSPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 9e9edb3feSPaul Mundt * License. See the file "COPYING" in the main directory of this archive 10e9edb3feSPaul Mundt * for more details. 11e9edb3feSPaul Mundt */ 12e9edb3feSPaul Mundt #include <linux/init.h> 13e9edb3feSPaul Mundt #include <linux/kernel.h> 14e9edb3feSPaul Mundt #include <linux/io.h> 15e9edb3feSPaul Mundt #include <linux/suspend.h> 16e9edb3feSPaul Mundt #include <asm/suspend.h> 17e9edb3feSPaul Mundt #include <asm/uaccess.h> 1899675a7aSMagnus Damm #include <asm/cacheflush.h> 19e9edb3feSPaul Mundt 20e9edb3feSPaul Mundt /* 2149f42644SMagnus Damm * Notifier lists for pre/post sleep notification 2249f42644SMagnus Damm */ 2349f42644SMagnus Damm ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list); 2449f42644SMagnus Damm ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list); 2549f42644SMagnus Damm 2649f42644SMagnus Damm /* 27e9edb3feSPaul Mundt * Sleep modes available on SuperH Mobile: 28e9edb3feSPaul Mundt * 29e9edb3feSPaul Mundt * Sleep mode is just plain "sleep" instruction 30e9edb3feSPaul Mundt * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh 31e9edb3feSPaul Mundt * Standby Self-Refresh mode is above plus stopped clocks 32e9edb3feSPaul Mundt */ 33e9edb3feSPaul Mundt #define SUSP_MODE_SLEEP (SUSP_SH_SLEEP) 34e9edb3feSPaul Mundt #define SUSP_MODE_SLEEP_SF (SUSP_SH_SLEEP | SUSP_SH_SF) 35e9edb3feSPaul Mundt #define SUSP_MODE_STANDBY_SF (SUSP_SH_STANDBY | SUSP_SH_SF) 3641bfb7d7SMagnus Damm #define SUSP_MODE_RSTANDBY_SF \ 3741bfb7d7SMagnus Damm (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF) 38e9edb3feSPaul Mundt /* 39bb3e0eedSMagnus Damm * U-standby mode is unsupported since it needs bootloader hacks 40e9edb3feSPaul Mundt */ 41e9edb3feSPaul Mundt 4203625e71SMagnus Damm #ifdef CONFIG_CPU_SUBTYPE_SH7724 4303625e71SMagnus Damm #define RAM_BASE 0xfd800000 /* RSMEM */ 4403625e71SMagnus Damm #else 4503625e71SMagnus Damm #define RAM_BASE 0xe5200000 /* ILRAM */ 4603625e71SMagnus Damm #endif 477426394fSMagnus Damm 487426394fSMagnus Damm void sh_mobile_call_standby(unsigned long mode) 49e9edb3feSPaul Mundt { 5003625e71SMagnus Damm void *onchip_mem = (void *)RAM_BASE; 51323ef8dbSMagnus Damm struct sh_sleep_data *sdp = onchip_mem; 52323ef8dbSMagnus Damm void (*standby_onchip_mem)(unsigned long, unsigned long); 53323ef8dbSMagnus Damm 54323ef8dbSMagnus Damm /* code located directly after data structure */ 55323ef8dbSMagnus Damm standby_onchip_mem = (void *)(sdp + 1); 56e9edb3feSPaul Mundt 5749f42644SMagnus Damm atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list, 5849f42644SMagnus Damm mode, NULL); 5949f42644SMagnus Damm 6099675a7aSMagnus Damm /* flush the caches if MMU flag is set */ 6199675a7aSMagnus Damm if (mode & SUSP_SH_MMU) 6299675a7aSMagnus Damm flush_cache_all(); 6399675a7aSMagnus Damm 64e9edb3feSPaul Mundt /* Let assembly snippet in on-chip memory handle the rest */ 6503625e71SMagnus Damm standby_onchip_mem(mode, RAM_BASE); 6649f42644SMagnus Damm 6749f42644SMagnus Damm atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list, 6849f42644SMagnus Damm mode, NULL); 69e9edb3feSPaul Mundt } 70e9edb3feSPaul Mundt 71323ef8dbSMagnus Damm extern char sh_mobile_sleep_enter_start; 72323ef8dbSMagnus Damm extern char sh_mobile_sleep_enter_end; 73323ef8dbSMagnus Damm 74323ef8dbSMagnus Damm extern char sh_mobile_sleep_resume_start; 75323ef8dbSMagnus Damm extern char sh_mobile_sleep_resume_end; 76323ef8dbSMagnus Damm 7702bf8934SMagnus Damm unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP; 7802bf8934SMagnus Damm 79159f8cd9SMagnus Damm void sh_mobile_register_self_refresh(unsigned long flags, 80159f8cd9SMagnus Damm void *pre_start, void *pre_end, 81159f8cd9SMagnus Damm void *post_start, void *post_end) 82159f8cd9SMagnus Damm { 8303625e71SMagnus Damm void *onchip_mem = (void *)RAM_BASE; 84323ef8dbSMagnus Damm void *vp; 85323ef8dbSMagnus Damm struct sh_sleep_data *sdp; 86323ef8dbSMagnus Damm int n; 87323ef8dbSMagnus Damm 88323ef8dbSMagnus Damm /* part 0: data area */ 89323ef8dbSMagnus Damm sdp = onchip_mem; 90323ef8dbSMagnus Damm sdp->addr.stbcr = 0xa4150020; /* STBCR */ 91bb3e0eedSMagnus Damm sdp->addr.bar = 0xa4150040; /* BAR */ 9299675a7aSMagnus Damm sdp->addr.pteh = 0xff000000; /* PTEH */ 9399675a7aSMagnus Damm sdp->addr.ptel = 0xff000004; /* PTEL */ 9499675a7aSMagnus Damm sdp->addr.ttb = 0xff000008; /* TTB */ 9599675a7aSMagnus Damm sdp->addr.tea = 0xff00000c; /* TEA */ 9699675a7aSMagnus Damm sdp->addr.mmucr = 0xff000010; /* MMUCR */ 9799675a7aSMagnus Damm sdp->addr.ptea = 0xff000034; /* PTEA */ 9899675a7aSMagnus Damm sdp->addr.pascr = 0xff000070; /* PASCR */ 9999675a7aSMagnus Damm sdp->addr.irmcr = 0xff000078; /* IRMCR */ 10099675a7aSMagnus Damm sdp->addr.ccr = 0xff00001c; /* CCR */ 10199675a7aSMagnus Damm sdp->addr.ramcr = 0xff000074; /* RAMCR */ 102323ef8dbSMagnus Damm vp = sdp + 1; 103323ef8dbSMagnus Damm 104323ef8dbSMagnus Damm /* part 1: common code to enter sleep mode */ 105323ef8dbSMagnus Damm n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start; 106323ef8dbSMagnus Damm memcpy(vp, &sh_mobile_sleep_enter_start, n); 107323ef8dbSMagnus Damm vp += roundup(n, 4); 108323ef8dbSMagnus Damm 109323ef8dbSMagnus Damm /* part 2: board specific code to enter self-refresh mode */ 110323ef8dbSMagnus Damm n = pre_end - pre_start; 111323ef8dbSMagnus Damm memcpy(vp, pre_start, n); 112323ef8dbSMagnus Damm sdp->sf_pre = (unsigned long)vp; 113323ef8dbSMagnus Damm vp += roundup(n, 4); 114323ef8dbSMagnus Damm 115323ef8dbSMagnus Damm /* part 3: board specific code to resume from self-refresh mode */ 116323ef8dbSMagnus Damm n = post_end - post_start; 117323ef8dbSMagnus Damm memcpy(vp, post_start, n); 118323ef8dbSMagnus Damm sdp->sf_post = (unsigned long)vp; 119323ef8dbSMagnus Damm vp += roundup(n, 4); 120323ef8dbSMagnus Damm 121323ef8dbSMagnus Damm /* part 4: common code to resume from sleep mode */ 122323ef8dbSMagnus Damm WARN_ON(vp > (onchip_mem + 0x600)); 123323ef8dbSMagnus Damm vp = onchip_mem + 0x600; /* located at interrupt vector */ 124323ef8dbSMagnus Damm n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start; 125323ef8dbSMagnus Damm memcpy(vp, &sh_mobile_sleep_resume_start, n); 126bb3e0eedSMagnus Damm sdp->resume = (unsigned long)vp; 12702bf8934SMagnus Damm 12802bf8934SMagnus Damm sh_mobile_sleep_supported |= flags; 129159f8cd9SMagnus Damm } 130159f8cd9SMagnus Damm 131e9edb3feSPaul Mundt static int sh_pm_enter(suspend_state_t state) 132e9edb3feSPaul Mundt { 13302bf8934SMagnus Damm if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF)) 13402bf8934SMagnus Damm return -ENXIO; 13502bf8934SMagnus Damm 136e9edb3feSPaul Mundt local_irq_disable(); 137e9edb3feSPaul Mundt set_bl_bit(); 138e9edb3feSPaul Mundt sh_mobile_call_standby(SUSP_MODE_STANDBY_SF); 139e9edb3feSPaul Mundt local_irq_disable(); 140e9edb3feSPaul Mundt clear_bl_bit(); 141e9edb3feSPaul Mundt return 0; 142e9edb3feSPaul Mundt } 143e9edb3feSPaul Mundt 1442f55ac07SLionel Debroux static const struct platform_suspend_ops sh_pm_ops = { 145e9edb3feSPaul Mundt .enter = sh_pm_enter, 146e9edb3feSPaul Mundt .valid = suspend_valid_only_mem, 147e9edb3feSPaul Mundt }; 148e9edb3feSPaul Mundt 149e9edb3feSPaul Mundt static int __init sh_pm_init(void) 150e9edb3feSPaul Mundt { 151e9edb3feSPaul Mundt suspend_set_ops(&sh_pm_ops); 1527426394fSMagnus Damm sh_mobile_setup_cpuidle(); 153e9edb3feSPaul Mundt return 0; 154e9edb3feSPaul Mundt } 155e9edb3feSPaul Mundt 156e9edb3feSPaul Mundt late_initcall(sh_pm_init); 157