xref: /openbmc/linux/arch/sh/kernel/cpu/shmobile/pm.c (revision 176ce1b7)
1176ce1b7SKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
2e9edb3feSPaul Mundt /*
37426394fSMagnus Damm  * arch/sh/kernel/cpu/shmobile/pm.c
4e9edb3feSPaul Mundt  *
5e9edb3feSPaul Mundt  * Power management support code for SuperH Mobile
6e9edb3feSPaul Mundt  *
7e9edb3feSPaul Mundt  *  Copyright (C) 2009 Magnus Damm
8e9edb3feSPaul Mundt  */
9e9edb3feSPaul Mundt #include <linux/init.h>
10e9edb3feSPaul Mundt #include <linux/kernel.h>
11e9edb3feSPaul Mundt #include <linux/io.h>
12e9edb3feSPaul Mundt #include <linux/suspend.h>
13e9edb3feSPaul Mundt #include <asm/suspend.h>
147c0f6ba6SLinus Torvalds #include <linux/uaccess.h>
1599675a7aSMagnus Damm #include <asm/cacheflush.h>
16f03c4866SPaul Mundt #include <asm/bl_bit.h>
17e9edb3feSPaul Mundt 
18e9edb3feSPaul Mundt /*
1949f42644SMagnus Damm  * Notifier lists for pre/post sleep notification
2049f42644SMagnus Damm  */
2149f42644SMagnus Damm ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
2249f42644SMagnus Damm ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
2349f42644SMagnus Damm 
2449f42644SMagnus Damm /*
25e9edb3feSPaul Mundt  * Sleep modes available on SuperH Mobile:
26e9edb3feSPaul Mundt  *
27e9edb3feSPaul Mundt  * Sleep mode is just plain "sleep" instruction
28e9edb3feSPaul Mundt  * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
29e9edb3feSPaul Mundt  * Standby Self-Refresh mode is above plus stopped clocks
30e9edb3feSPaul Mundt  */
31e9edb3feSPaul Mundt #define SUSP_MODE_SLEEP		(SUSP_SH_SLEEP)
32e9edb3feSPaul Mundt #define SUSP_MODE_SLEEP_SF	(SUSP_SH_SLEEP | SUSP_SH_SF)
33e9edb3feSPaul Mundt #define SUSP_MODE_STANDBY_SF	(SUSP_SH_STANDBY | SUSP_SH_SF)
3441bfb7d7SMagnus Damm #define SUSP_MODE_RSTANDBY_SF \
3541bfb7d7SMagnus Damm 	(SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
36e9edb3feSPaul Mundt  /*
37bb3e0eedSMagnus Damm   * U-standby mode is unsupported since it needs bootloader hacks
38e9edb3feSPaul Mundt   */
39e9edb3feSPaul Mundt 
4003625e71SMagnus Damm #ifdef CONFIG_CPU_SUBTYPE_SH7724
4103625e71SMagnus Damm #define RAM_BASE 0xfd800000 /* RSMEM */
4203625e71SMagnus Damm #else
4303625e71SMagnus Damm #define RAM_BASE 0xe5200000 /* ILRAM */
4403625e71SMagnus Damm #endif
457426394fSMagnus Damm 
sh_mobile_call_standby(unsigned long mode)467426394fSMagnus Damm void sh_mobile_call_standby(unsigned long mode)
47e9edb3feSPaul Mundt {
4803625e71SMagnus Damm 	void *onchip_mem = (void *)RAM_BASE;
49323ef8dbSMagnus Damm 	struct sh_sleep_data *sdp = onchip_mem;
50323ef8dbSMagnus Damm 	void (*standby_onchip_mem)(unsigned long, unsigned long);
51323ef8dbSMagnus Damm 
52323ef8dbSMagnus Damm 	/* code located directly after data structure */
53323ef8dbSMagnus Damm 	standby_onchip_mem = (void *)(sdp + 1);
54e9edb3feSPaul Mundt 
5549f42644SMagnus Damm 	atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
5649f42644SMagnus Damm 				   mode, NULL);
5749f42644SMagnus Damm 
5899675a7aSMagnus Damm 	/* flush the caches if MMU flag is set */
5999675a7aSMagnus Damm 	if (mode & SUSP_SH_MMU)
6099675a7aSMagnus Damm 		flush_cache_all();
6199675a7aSMagnus Damm 
62e9edb3feSPaul Mundt 	/* Let assembly snippet in on-chip memory handle the rest */
6303625e71SMagnus Damm 	standby_onchip_mem(mode, RAM_BASE);
6449f42644SMagnus Damm 
6549f42644SMagnus Damm 	atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
6649f42644SMagnus Damm 				   mode, NULL);
67e9edb3feSPaul Mundt }
68e9edb3feSPaul Mundt 
69323ef8dbSMagnus Damm extern char sh_mobile_sleep_enter_start;
70323ef8dbSMagnus Damm extern char sh_mobile_sleep_enter_end;
71323ef8dbSMagnus Damm 
72323ef8dbSMagnus Damm extern char sh_mobile_sleep_resume_start;
73323ef8dbSMagnus Damm extern char sh_mobile_sleep_resume_end;
74323ef8dbSMagnus Damm 
7502bf8934SMagnus Damm unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
7602bf8934SMagnus Damm 
sh_mobile_register_self_refresh(unsigned long flags,void * pre_start,void * pre_end,void * post_start,void * post_end)77159f8cd9SMagnus Damm void sh_mobile_register_self_refresh(unsigned long flags,
78159f8cd9SMagnus Damm 				     void *pre_start, void *pre_end,
79159f8cd9SMagnus Damm 				     void *post_start, void *post_end)
80159f8cd9SMagnus Damm {
8103625e71SMagnus Damm 	void *onchip_mem = (void *)RAM_BASE;
82323ef8dbSMagnus Damm 	void *vp;
83323ef8dbSMagnus Damm 	struct sh_sleep_data *sdp;
84323ef8dbSMagnus Damm 	int n;
85323ef8dbSMagnus Damm 
86323ef8dbSMagnus Damm 	/* part 0: data area */
87323ef8dbSMagnus Damm 	sdp = onchip_mem;
88323ef8dbSMagnus Damm 	sdp->addr.stbcr = 0xa4150020; /* STBCR */
89bb3e0eedSMagnus Damm 	sdp->addr.bar = 0xa4150040; /* BAR */
9099675a7aSMagnus Damm 	sdp->addr.pteh = 0xff000000; /* PTEH */
9199675a7aSMagnus Damm 	sdp->addr.ptel = 0xff000004; /* PTEL */
9299675a7aSMagnus Damm 	sdp->addr.ttb = 0xff000008; /* TTB */
9399675a7aSMagnus Damm 	sdp->addr.tea = 0xff00000c; /* TEA */
9499675a7aSMagnus Damm 	sdp->addr.mmucr = 0xff000010; /* MMUCR */
9599675a7aSMagnus Damm 	sdp->addr.ptea = 0xff000034; /* PTEA */
9699675a7aSMagnus Damm 	sdp->addr.pascr = 0xff000070; /* PASCR */
9799675a7aSMagnus Damm 	sdp->addr.irmcr = 0xff000078; /* IRMCR */
9899675a7aSMagnus Damm 	sdp->addr.ccr = 0xff00001c; /* CCR */
9999675a7aSMagnus Damm 	sdp->addr.ramcr = 0xff000074; /* RAMCR */
100323ef8dbSMagnus Damm 	vp = sdp + 1;
101323ef8dbSMagnus Damm 
102323ef8dbSMagnus Damm 	/* part 1: common code to enter sleep mode */
103323ef8dbSMagnus Damm 	n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
104323ef8dbSMagnus Damm 	memcpy(vp, &sh_mobile_sleep_enter_start, n);
105323ef8dbSMagnus Damm 	vp += roundup(n, 4);
106323ef8dbSMagnus Damm 
107323ef8dbSMagnus Damm 	/* part 2: board specific code to enter self-refresh mode */
108323ef8dbSMagnus Damm 	n = pre_end - pre_start;
109323ef8dbSMagnus Damm 	memcpy(vp, pre_start, n);
110323ef8dbSMagnus Damm 	sdp->sf_pre = (unsigned long)vp;
111323ef8dbSMagnus Damm 	vp += roundup(n, 4);
112323ef8dbSMagnus Damm 
113323ef8dbSMagnus Damm 	/* part 3: board specific code to resume from self-refresh mode */
114323ef8dbSMagnus Damm 	n = post_end - post_start;
115323ef8dbSMagnus Damm 	memcpy(vp, post_start, n);
116323ef8dbSMagnus Damm 	sdp->sf_post = (unsigned long)vp;
117323ef8dbSMagnus Damm 	vp += roundup(n, 4);
118323ef8dbSMagnus Damm 
119323ef8dbSMagnus Damm 	/* part 4: common code to resume from sleep mode */
120323ef8dbSMagnus Damm 	WARN_ON(vp > (onchip_mem + 0x600));
121323ef8dbSMagnus Damm 	vp = onchip_mem + 0x600; /* located at interrupt vector */
122323ef8dbSMagnus Damm 	n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
123323ef8dbSMagnus Damm 	memcpy(vp, &sh_mobile_sleep_resume_start, n);
124bb3e0eedSMagnus Damm 	sdp->resume = (unsigned long)vp;
12502bf8934SMagnus Damm 
12602bf8934SMagnus Damm 	sh_mobile_sleep_supported |= flags;
127159f8cd9SMagnus Damm }
128159f8cd9SMagnus Damm 
sh_pm_enter(suspend_state_t state)129e9edb3feSPaul Mundt static int sh_pm_enter(suspend_state_t state)
130e9edb3feSPaul Mundt {
13102bf8934SMagnus Damm 	if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
13202bf8934SMagnus Damm 		return -ENXIO;
13302bf8934SMagnus Damm 
134e9edb3feSPaul Mundt 	local_irq_disable();
135e9edb3feSPaul Mundt 	set_bl_bit();
136e9edb3feSPaul Mundt 	sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
137e9edb3feSPaul Mundt 	local_irq_disable();
138e9edb3feSPaul Mundt 	clear_bl_bit();
139e9edb3feSPaul Mundt 	return 0;
140e9edb3feSPaul Mundt }
141e9edb3feSPaul Mundt 
1422f55ac07SLionel Debroux static const struct platform_suspend_ops sh_pm_ops = {
143e9edb3feSPaul Mundt 	.enter          = sh_pm_enter,
144e9edb3feSPaul Mundt 	.valid          = suspend_valid_only_mem,
145e9edb3feSPaul Mundt };
146e9edb3feSPaul Mundt 
sh_pm_init(void)147e9edb3feSPaul Mundt static int __init sh_pm_init(void)
148e9edb3feSPaul Mundt {
149e9edb3feSPaul Mundt 	suspend_set_ops(&sh_pm_ops);
15038a94f41SDaniel Lezcano 	return sh_mobile_setup_cpuidle();
151e9edb3feSPaul Mundt }
152e9edb3feSPaul Mundt 
153e9edb3feSPaul Mundt late_initcall(sh_pm_init);
154