1 /*
2  * SH7785 Setup
3  *
4  *  Copyright (C) 2007  Paul Mundt
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 #include <linux/platform_device.h>
11 #include <linux/init.h>
12 #include <linux/serial.h>
13 #include <asm/sci.h>
14 
15 static struct plat_sci_port sci_platform_data[] = {
16 	{
17 		.mapbase	= 0xffea0000,
18 		.flags		= UPF_BOOT_AUTOCONF,
19 		.type		= PORT_SCIF,
20 		.irqs		= { 40, 41, 43, 42 },
21 	}, {
22 		.mapbase	= 0xffeb0000,
23 		.flags		= UPF_BOOT_AUTOCONF,
24 		.type		= PORT_SCIF,
25 		.irqs		= { 44, 45, 47, 46 },
26 	},
27 
28 	/*
29 	 * The rest of these all have multiplexed IRQs
30 	 */
31 	{
32 		.mapbase	= 0xffec0000,
33 		.flags		= UPF_BOOT_AUTOCONF,
34 		.type		= PORT_SCIF,
35 		.irqs		= { 60, 60, 60, 60 },
36 	}, {
37 		.mapbase	= 0xffed0000,
38 		.flags		= UPF_BOOT_AUTOCONF,
39 		.type		= PORT_SCIF,
40 		.irqs		= { 61, 61, 61, 61 },
41 	}, {
42 		.mapbase	= 0xffee0000,
43 		.flags		= UPF_BOOT_AUTOCONF,
44 		.type		= PORT_SCIF,
45 		.irqs		= { 62, 62, 62, 62 },
46 	}, {
47 		.mapbase	= 0xffef0000,
48 		.flags		= UPF_BOOT_AUTOCONF,
49 		.type		= PORT_SCIF,
50 		.irqs		= { 63, 63, 63, 63 },
51 	}, {
52 		.flags = 0,
53 	}
54 };
55 
56 static struct platform_device sci_device = {
57 	.name		= "sh-sci",
58 	.id		= -1,
59 	.dev		= {
60 		.platform_data	= sci_platform_data,
61 	},
62 };
63 
64 static struct platform_device *sh7785_devices[] __initdata = {
65 	&sci_device,
66 };
67 
68 static int __init sh7785_devices_setup(void)
69 {
70 	return platform_add_devices(sh7785_devices,
71 				    ARRAY_SIZE(sh7785_devices));
72 }
73 __initcall(sh7785_devices_setup);
74 
75 static struct intc2_data intc2_irq_table[] = {
76 	{ 28, 0, 24, 0, 0, 2 },		/* TMU0 */
77 
78 	{ 40, 8, 24, 0, 2, 3 },		/* SCIF0 ERI */
79 	{ 41, 8, 24, 0, 2, 3 },		/* SCIF0 RXI */
80 	{ 42, 8, 24, 0, 2, 3 },		/* SCIF0 BRI */
81 	{ 43, 8, 24, 0, 2, 3 },		/* SCIF0 TXI */
82 
83 	{ 44, 8, 16, 0, 3, 3 },		/* SCIF1 ERI */
84 	{ 45, 8, 16, 0, 3, 3 },		/* SCIF1 RXI */
85 	{ 46, 8, 16, 0, 3, 3 },		/* SCIF1 BRI */
86 	{ 47, 8, 16, 0, 3, 3 },		/* SCIF1 TXI */
87 
88 	{ 64, 0x14,  8, 0, 14, 2 },	/* PCIC0 */
89 	{ 65, 0x14,  0, 0, 15, 2 },	/* PCIC1 */
90 	{ 66, 0x18, 24, 0, 16, 2 },	/* PCIC2 */
91 	{ 67, 0x18, 16, 0, 17, 2 },	/* PCIC3 */
92 	{ 68, 0x18,  8, 0, 18, 2 },	/* PCIC4 */
93 
94 	{ 60,  8,  8, 0, 4, 3 },	/* SCIF2 ERI, RXI, BRI, TXI */
95 	{ 60,  8,  0, 0, 5, 3 },	/* SCIF3 ERI, RXI, BRI, TXI */
96 	{ 60, 12, 24, 0, 6, 3 },	/* SCIF4 ERI, RXI, BRI, TXI */
97 	{ 60, 12, 16, 0, 7, 3 },	/* SCIF5 ERI, RXI, BRI, TXI */
98 };
99 
100 static struct intc2_desc intc2_irq_desc __read_mostly = {
101 	.prio_base	= 0xffd40000,
102 	.msk_base	= 0xffd40038,
103 	.mskclr_base	= 0xffd4003c,
104 
105 	.intc2_data	= intc2_irq_table,
106 	.nr_irqs	= ARRAY_SIZE(intc2_irq_table),
107 
108 	.chip = {
109 		.name	= "INTC2-sh7785",
110 	},
111 };
112 
113 void __init plat_irq_setup(void)
114 {
115 	register_intc2_controller(&intc2_irq_desc);
116 }
117 
118