1 /* 2 * SH7722 Setup 3 * 4 * Copyright (C) 2006 - 2007 Paul Mundt 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 #include <linux/platform_device.h> 11 #include <linux/init.h> 12 #include <linux/serial.h> 13 #include <linux/serial_sci.h> 14 #include <linux/mm.h> 15 #include <linux/uio_driver.h> 16 #include <asm/clock.h> 17 #include <asm/mmzone.h> 18 19 static struct resource usbf_resources[] = { 20 [0] = { 21 .name = "m66592_udc", 22 .start = 0x04480000, 23 .end = 0x044800FF, 24 .flags = IORESOURCE_MEM, 25 }, 26 [1] = { 27 .start = 65, 28 .end = 65, 29 .flags = IORESOURCE_IRQ, 30 }, 31 }; 32 33 static struct platform_device usbf_device = { 34 .name = "m66592_udc", 35 .id = -1, 36 .dev = { 37 .dma_mask = NULL, 38 .coherent_dma_mask = 0xffffffff, 39 }, 40 .num_resources = ARRAY_SIZE(usbf_resources), 41 .resource = usbf_resources, 42 }; 43 44 static struct resource iic_resources[] = { 45 [0] = { 46 .name = "IIC", 47 .start = 0x04470000, 48 .end = 0x04470017, 49 .flags = IORESOURCE_MEM, 50 }, 51 [1] = { 52 .start = 96, 53 .end = 99, 54 .flags = IORESOURCE_IRQ, 55 }, 56 }; 57 58 static struct platform_device iic_device = { 59 .name = "i2c-sh_mobile", 60 .num_resources = ARRAY_SIZE(iic_resources), 61 .resource = iic_resources, 62 }; 63 64 static struct uio_info vpu_platform_data = { 65 .name = "VPU4", 66 .version = "0", 67 .irq = 60, 68 }; 69 70 static struct resource vpu_resources[] = { 71 [0] = { 72 .name = "VPU", 73 .start = 0xfe900000, 74 .end = 0xfe9022eb, 75 .flags = IORESOURCE_MEM, 76 }, 77 [1] = { 78 /* place holder for contiguous memory */ 79 }, 80 }; 81 82 static struct platform_device vpu_device = { 83 .name = "uio_pdrv_genirq", 84 .id = 0, 85 .dev = { 86 .platform_data = &vpu_platform_data, 87 }, 88 .resource = vpu_resources, 89 .num_resources = ARRAY_SIZE(vpu_resources), 90 }; 91 92 static struct uio_info veu_platform_data = { 93 .name = "VEU", 94 .version = "0", 95 .irq = 54, 96 }; 97 98 static struct resource veu_resources[] = { 99 [0] = { 100 .name = "VEU", 101 .start = 0xfe920000, 102 .end = 0xfe9200b7, 103 .flags = IORESOURCE_MEM, 104 }, 105 [1] = { 106 /* place holder for contiguous memory */ 107 }, 108 }; 109 110 static struct platform_device veu_device = { 111 .name = "uio_pdrv_genirq", 112 .id = 1, 113 .dev = { 114 .platform_data = &veu_platform_data, 115 }, 116 .resource = veu_resources, 117 .num_resources = ARRAY_SIZE(veu_resources), 118 }; 119 120 static struct plat_sci_port sci_platform_data[] = { 121 { 122 .mapbase = 0xffe00000, 123 .flags = UPF_BOOT_AUTOCONF, 124 .type = PORT_SCIF, 125 .irqs = { 80, 80, 80, 80 }, 126 }, 127 { 128 .mapbase = 0xffe10000, 129 .flags = UPF_BOOT_AUTOCONF, 130 .type = PORT_SCIF, 131 .irqs = { 81, 81, 81, 81 }, 132 }, 133 { 134 .mapbase = 0xffe20000, 135 .flags = UPF_BOOT_AUTOCONF, 136 .type = PORT_SCIF, 137 .irqs = { 82, 82, 82, 82 }, 138 }, 139 { 140 .flags = 0, 141 } 142 }; 143 144 static struct platform_device sci_device = { 145 .name = "sh-sci", 146 .id = -1, 147 .dev = { 148 .platform_data = sci_platform_data, 149 }, 150 }; 151 152 static struct platform_device *sh7722_devices[] __initdata = { 153 &usbf_device, 154 &iic_device, 155 &sci_device, 156 &vpu_device, 157 &veu_device, 158 }; 159 160 static int __init sh7722_devices_setup(void) 161 { 162 clk_always_enable("mstp031"); /* TLB */ 163 clk_always_enable("mstp030"); /* IC */ 164 clk_always_enable("mstp029"); /* OC */ 165 clk_always_enable("mstp028"); /* URAM */ 166 clk_always_enable("mstp026"); /* XYMEM */ 167 clk_always_enable("mstp022"); /* INTC */ 168 clk_always_enable("mstp020"); /* SuperHyway */ 169 clk_always_enable("mstp109"); /* I2C */ 170 clk_always_enable("mstp211"); /* USB */ 171 clk_always_enable("mstp202"); /* VEU */ 172 clk_always_enable("mstp201"); /* VPU */ 173 174 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); 175 platform_resource_setup_memory(&veu_device, "veu", 2 << 20); 176 177 return platform_add_devices(sh7722_devices, 178 ARRAY_SIZE(sh7722_devices)); 179 } 180 __initcall(sh7722_devices_setup); 181 182 enum { 183 UNUSED=0, 184 185 /* interrupt sources */ 186 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 187 HUDI, 188 SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI, 189 RTC_ATI, RTC_PRI, RTC_CUI, 190 DMAC0, DMAC1, DMAC2, DMAC3, 191 VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU, 192 VPU, TPU, 193 USB_USBI0, USB_USBI1, 194 DMAC4, DMAC5, DMAC_DADERR, 195 KEYSC, 196 SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO, 197 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 198 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, 199 SDHI0, SDHI1, SDHI2, SDHI3, 200 CMT, TSIF, SIU, TWODG, 201 TMU0, TMU1, TMU2, 202 IRDA, JPU, LCDC, 203 204 /* interrupt groups */ 205 206 SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, 207 }; 208 209 static struct intc_vect vectors[] __initdata = { 210 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), 211 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), 212 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 213 INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0), 214 INTC_VECT(SIM_ERI, 0x700), INTC_VECT(SIM_RXI, 0x720), 215 INTC_VECT(SIM_TXI, 0x740), INTC_VECT(SIM_TEI, 0x760), 216 INTC_VECT(RTC_ATI, 0x780), INTC_VECT(RTC_PRI, 0x7a0), 217 INTC_VECT(RTC_CUI, 0x7c0), 218 INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820), 219 INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860), 220 INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0), 221 INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0), 222 INTC_VECT(VPU, 0x980), INTC_VECT(TPU, 0x9a0), 223 INTC_VECT(USB_USBI0, 0xa20), INTC_VECT(USB_USBI1, 0xa40), 224 INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0), 225 INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0), 226 INTC_VECT(SCIF0, 0xc00), INTC_VECT(SCIF1, 0xc20), 227 INTC_VECT(SCIF2, 0xc40), INTC_VECT(SIOF0, 0xc80), 228 INTC_VECT(SIOF1, 0xca0), INTC_VECT(SIO, 0xd00), 229 INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0), 230 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), 231 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), 232 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), 233 INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), 234 INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), 235 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), 236 INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0), 237 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 238 INTC_VECT(TMU2, 0x440), INTC_VECT(IRDA, 0x480), 239 INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580), 240 }; 241 242 static struct intc_group groups[] __initdata = { 243 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI), 244 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), 245 INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), 246 INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU), 247 INTC_GROUP(USB, USB_USBI0, USB_USBI1), 248 INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR), 249 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 250 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 251 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), 252 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), 253 }; 254 255 static struct intc_mask_reg mask_registers[] __initdata = { 256 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 257 { } }, 258 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 259 { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } }, 260 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ 261 { 0, 0, 0, VPU, } }, 262 { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */ 263 { SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } }, 264 { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */ 265 { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } }, 266 { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */ 267 { KEYSC, DMAC_DADERR, DMAC5, DMAC4, 0, SCIF2, SCIF1, SCIF0 } }, 268 { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */ 269 { 0, 0, 0, SIO, 0, 0, SIOF1, SIOF0 } }, 270 { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */ 271 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 272 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 273 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 274 { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, TWODG, SIU } }, 275 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 276 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, 277 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 278 { } }, 279 { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */ 280 { 0, RTC_CUI, RTC_PRI, RTC_ATI, 0, TPU, 0, TSIF } }, 281 { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */ 282 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 283 }; 284 285 static struct intc_prio_reg prio_registers[] __initdata = { 286 { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } }, 287 { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } }, 288 { 0xa4080008, 0, 16, 4, /* IPRC */ { } }, 289 { 0xa408000c, 0, 16, 4, /* IPRD */ { } }, 290 { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, 0, VPU } }, 291 { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, 292 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, SCIF2 } }, 293 { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } }, 294 { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } }, 295 { 0xa4080024, 0, 16, 4, /* IPRJ */ { 0, 0, SIU } }, 296 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } }, 297 { 0xa408002c, 0, 16, 4, /* IPRL */ { TWODG, 0, TPU } }, 298 { 0xa4140010, 0, 32, 4, /* INTPRI00 */ 299 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 300 }; 301 302 static struct intc_sense_reg sense_registers[] __initdata = { 303 { 0xa414001c, 16, 2, /* ICR1 */ 304 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 305 }; 306 307 static struct intc_mask_reg ack_registers[] __initdata = { 308 { 0xa4140024, 0, 8, /* INTREQ00 */ 309 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 310 }; 311 312 static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups, 313 mask_registers, prio_registers, sense_registers, 314 ack_registers); 315 316 void __init plat_irq_setup(void) 317 { 318 register_intc_controller(&intc_desc); 319 } 320 321 void __init plat_mem_setup(void) 322 { 323 /* Register the URAM space as Node 1 */ 324 setup_bootmem_node(1, 0x055f0000, 0x05610000); 325 } 326