1 /* 2 * arch/sh/kernel/cpu/sh4a/clock-sh7763.c 3 * 4 * SH7763 support for the clock framework 5 * 6 * Copyright (C) 2005 Paul Mundt 7 * Copyright (C) 2007 Yoshihiro Shimoda 8 * 9 * This file is subject to the terms and conditions of the GNU General Public 10 * License. See the file "COPYING" in the main directory of this archive 11 * for more details. 12 */ 13 #include <linux/init.h> 14 #include <linux/kernel.h> 15 #include <asm/clock.h> 16 #include <asm/freq.h> 17 #include <asm/io.h> 18 19 static int bfc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 }; 20 static int p0fc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 }; 21 static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 }; 22 23 static void master_clk_init(struct clk *clk) 24 { 25 clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07]; 26 } 27 28 static struct clk_ops sh7763_master_clk_ops = { 29 .init = master_clk_init, 30 }; 31 32 static unsigned long module_clk_recalc(struct clk *clk) 33 { 34 int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07); 35 return clk->parent->rate / p0fc_divisors[idx]; 36 } 37 38 static struct clk_ops sh7763_module_clk_ops = { 39 .recalc = module_clk_recalc, 40 }; 41 42 static unsigned long bus_clk_recalc(struct clk *clk) 43 { 44 int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07); 45 return clk->parent->rate / bfc_divisors[idx]; 46 } 47 48 static struct clk_ops sh7763_bus_clk_ops = { 49 .recalc = bus_clk_recalc, 50 }; 51 52 static struct clk_ops sh7763_cpu_clk_ops = { 53 .recalc = followparent_recalc, 54 }; 55 56 static struct clk_ops *sh7763_clk_ops[] = { 57 &sh7763_master_clk_ops, 58 &sh7763_module_clk_ops, 59 &sh7763_bus_clk_ops, 60 &sh7763_cpu_clk_ops, 61 }; 62 63 void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 64 { 65 if (idx < ARRAY_SIZE(sh7763_clk_ops)) 66 *ops = sh7763_clk_ops[idx]; 67 } 68 69 static unsigned long shyway_clk_recalc(struct clk *clk) 70 { 71 int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07); 72 return clk->parent->rate / cfc_divisors[idx]; 73 } 74 75 static struct clk_ops sh7763_shyway_clk_ops = { 76 .recalc = shyway_clk_recalc, 77 }; 78 79 static struct clk sh7763_shyway_clk = { 80 .name = "shyway_clk", 81 .flags = CLK_ENABLE_ON_INIT, 82 .ops = &sh7763_shyway_clk_ops, 83 }; 84 85 /* 86 * Additional SH7763-specific on-chip clocks that aren't already part of the 87 * clock framework 88 */ 89 static struct clk *sh7763_onchip_clocks[] = { 90 &sh7763_shyway_clk, 91 }; 92 93 int __init arch_clk_init(void) 94 { 95 struct clk *clk; 96 int i, ret = 0; 97 98 cpg_clk_init(); 99 100 clk = clk_get(NULL, "master_clk"); 101 for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) { 102 struct clk *clkp = sh7763_onchip_clocks[i]; 103 104 clkp->parent = clk; 105 ret |= clk_register(clkp); 106 } 107 108 clk_put(clk); 109 110 return ret; 111 } 112