1b621370aSMagnus Damm /* 2b621370aSMagnus Damm * arch/sh/kernel/cpu/sh4a/clock-sh7724.c 3b621370aSMagnus Damm * 4b621370aSMagnus Damm * SH7724 clock framework support 5b621370aSMagnus Damm * 6b621370aSMagnus Damm * Copyright (C) 2009 Magnus Damm 7b621370aSMagnus Damm * 8b621370aSMagnus Damm * This program is free software; you can redistribute it and/or modify 9b621370aSMagnus Damm * it under the terms of the GNU General Public License as published by 10b621370aSMagnus Damm * the Free Software Foundation; either version 2 of the License 11b621370aSMagnus Damm * 12b621370aSMagnus Damm * This program is distributed in the hope that it will be useful, 13b621370aSMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 14b621370aSMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15b621370aSMagnus Damm * GNU General Public License for more details. 16b621370aSMagnus Damm * 17b621370aSMagnus Damm * You should have received a copy of the GNU General Public License 18b621370aSMagnus Damm * along with this program; if not, write to the Free Software 19b621370aSMagnus Damm * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20b621370aSMagnus Damm */ 21b621370aSMagnus Damm #include <linux/init.h> 22b621370aSMagnus Damm #include <linux/kernel.h> 23b621370aSMagnus Damm #include <linux/io.h> 24f4cff0d0SPaul Mundt #include <linux/clk.h> 256d803ba7SJean-Christop PLAGNIOL-VILLARD #include <linux/clkdev.h> 268cc88a55SGuennadi Liakhovetski #include <linux/sh_clk.h> 27b621370aSMagnus Damm #include <asm/clock.h> 286ba4a8f0SMagnus Damm #include <cpu/sh7724.h> 29b621370aSMagnus Damm 30b621370aSMagnus Damm /* SH7724 registers */ 31b621370aSMagnus Damm #define FRQCRA 0xa4150000 32b621370aSMagnus Damm #define FRQCRB 0xa4150004 33b621370aSMagnus Damm #define VCLKCR 0xa4150048 34b621370aSMagnus Damm #define FCLKACR 0xa4150008 35b621370aSMagnus Damm #define FCLKBCR 0xa415000c 36b621370aSMagnus Damm #define IRDACLKCR 0xa4150018 37b621370aSMagnus Damm #define PLLCR 0xa4150024 388cc88a55SGuennadi Liakhovetski #define MSTPCR0 0xa4150030 398cc88a55SGuennadi Liakhovetski #define MSTPCR1 0xa4150034 408cc88a55SGuennadi Liakhovetski #define MSTPCR2 0xa4150038 41b621370aSMagnus Damm #define SPUCLKCR 0xa415003c 42b621370aSMagnus Damm #define FLLFRQ 0xa4150050 43b621370aSMagnus Damm #define LSTATS 0xa4150060 44b621370aSMagnus Damm 45b621370aSMagnus Damm /* Fixed 32 KHz root clock for RTC and Power Management purposes */ 46b621370aSMagnus Damm static struct clk r_clk = { 47b621370aSMagnus Damm .rate = 32768, 48b621370aSMagnus Damm }; 49b621370aSMagnus Damm 50b621370aSMagnus Damm /* 51b621370aSMagnus Damm * Default rate for the root input clock, reset this with clk_set_rate() 52b621370aSMagnus Damm * from the platform code. 53b621370aSMagnus Damm */ 54d0013c9eSGuennadi Liakhovetski static struct clk extal_clk = { 55b621370aSMagnus Damm .rate = 33333333, 56b621370aSMagnus Damm }; 57b621370aSMagnus Damm 58b621370aSMagnus Damm /* The fll multiplies the 32khz r_clk, may be used instead of extal */ 59b621370aSMagnus Damm static unsigned long fll_recalc(struct clk *clk) 60b621370aSMagnus Damm { 61b621370aSMagnus Damm unsigned long mult = 0; 62b621370aSMagnus Damm unsigned long div = 1; 63b621370aSMagnus Damm 64b621370aSMagnus Damm if (__raw_readl(PLLCR) & 0x1000) 65b621370aSMagnus Damm mult = __raw_readl(FLLFRQ) & 0x3ff; 66b621370aSMagnus Damm 67b621370aSMagnus Damm if (__raw_readl(FLLFRQ) & 0x4000) 68b621370aSMagnus Damm div = 2; 69b621370aSMagnus Damm 70b621370aSMagnus Damm return (clk->parent->rate * mult) / div; 71b621370aSMagnus Damm } 72b621370aSMagnus Damm 7333cb61a4SMagnus Damm static struct sh_clk_ops fll_clk_ops = { 74b621370aSMagnus Damm .recalc = fll_recalc, 75b621370aSMagnus Damm }; 76b621370aSMagnus Damm 77b621370aSMagnus Damm static struct clk fll_clk = { 78b621370aSMagnus Damm .ops = &fll_clk_ops, 79b621370aSMagnus Damm .parent = &r_clk, 80b621370aSMagnus Damm .flags = CLK_ENABLE_ON_INIT, 81b621370aSMagnus Damm }; 82b621370aSMagnus Damm 83b621370aSMagnus Damm static unsigned long pll_recalc(struct clk *clk) 84b621370aSMagnus Damm { 85b621370aSMagnus Damm unsigned long mult = 1; 86b621370aSMagnus Damm 87b621370aSMagnus Damm if (__raw_readl(PLLCR) & 0x4000) 88b621370aSMagnus Damm mult = (((__raw_readl(FRQCRA) >> 24) & 0x3f) + 1) * 2; 89b621370aSMagnus Damm 90b621370aSMagnus Damm return clk->parent->rate * mult; 91b621370aSMagnus Damm } 92b621370aSMagnus Damm 9333cb61a4SMagnus Damm static struct sh_clk_ops pll_clk_ops = { 94b621370aSMagnus Damm .recalc = pll_recalc, 95b621370aSMagnus Damm }; 96b621370aSMagnus Damm 97b621370aSMagnus Damm static struct clk pll_clk = { 98b621370aSMagnus Damm .ops = &pll_clk_ops, 99b621370aSMagnus Damm .flags = CLK_ENABLE_ON_INIT, 100b621370aSMagnus Damm }; 101b621370aSMagnus Damm 102b621370aSMagnus Damm /* A fixed divide-by-3 block use by the div6 clocks */ 103b621370aSMagnus Damm static unsigned long div3_recalc(struct clk *clk) 104b621370aSMagnus Damm { 105b621370aSMagnus Damm return clk->parent->rate / 3; 106b621370aSMagnus Damm } 107b621370aSMagnus Damm 10833cb61a4SMagnus Damm static struct sh_clk_ops div3_clk_ops = { 109b621370aSMagnus Damm .recalc = div3_recalc, 110b621370aSMagnus Damm }; 111b621370aSMagnus Damm 112b621370aSMagnus Damm static struct clk div3_clk = { 113b621370aSMagnus Damm .ops = &div3_clk_ops, 114b621370aSMagnus Damm .parent = &pll_clk, 115b621370aSMagnus Damm }; 116b621370aSMagnus Damm 117171f1bc7SKuninori Morimoto /* External input clock (pin name: FSIMCKA/FSIMCKB/DV_CLKI ) */ 1184bd5d259SKuninori Morimoto struct clk sh7724_fsimcka_clk = { 1194bd5d259SKuninori Morimoto }; 1204bd5d259SKuninori Morimoto 1214bd5d259SKuninori Morimoto struct clk sh7724_fsimckb_clk = { 1224bd5d259SKuninori Morimoto }; 1234bd5d259SKuninori Morimoto 124171f1bc7SKuninori Morimoto struct clk sh7724_dv_clki = { 125171f1bc7SKuninori Morimoto }; 126171f1bc7SKuninori Morimoto 127d0013c9eSGuennadi Liakhovetski static struct clk *main_clks[] = { 128b621370aSMagnus Damm &r_clk, 129b621370aSMagnus Damm &extal_clk, 130b621370aSMagnus Damm &fll_clk, 131b621370aSMagnus Damm &pll_clk, 132b621370aSMagnus Damm &div3_clk, 1334bd5d259SKuninori Morimoto &sh7724_fsimcka_clk, 1344bd5d259SKuninori Morimoto &sh7724_fsimckb_clk, 135171f1bc7SKuninori Morimoto &sh7724_dv_clki, 136b621370aSMagnus Damm }; 137b621370aSMagnus Damm 1387be85c6eSMagnus Damm static void div4_kick(struct clk *clk) 1397be85c6eSMagnus Damm { 1407be85c6eSMagnus Damm unsigned long value; 1417be85c6eSMagnus Damm 1427be85c6eSMagnus Damm /* set KICK bit in FRQCRA to update hardware setting */ 1437be85c6eSMagnus Damm value = __raw_readl(FRQCRA); 1447be85c6eSMagnus Damm value |= (1 << 31); 1457be85c6eSMagnus Damm __raw_writel(value, FRQCRA); 1467be85c6eSMagnus Damm } 1477be85c6eSMagnus Damm 148b2ea8b42SKuninori Morimoto static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; 149b621370aSMagnus Damm 1500a5f337eSMagnus Damm static struct clk_div_mult_table div4_div_mult_table = { 151b621370aSMagnus Damm .divisors = divisors, 152b621370aSMagnus Damm .nr_divisors = ARRAY_SIZE(divisors), 153b621370aSMagnus Damm }; 154b621370aSMagnus Damm 1550a5f337eSMagnus Damm static struct clk_div4_table div4_table = { 1560a5f337eSMagnus Damm .div_mult_table = &div4_div_mult_table, 1577be85c6eSMagnus Damm .kick = div4_kick, 1580a5f337eSMagnus Damm }; 1590a5f337eSMagnus Damm 160b621370aSMagnus Damm enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; 161b621370aSMagnus Damm 162914ebf0bSMagnus Damm #define DIV4(_reg, _bit, _mask, _flags) \ 163914ebf0bSMagnus Damm SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) 164b621370aSMagnus Damm 165b621370aSMagnus Damm struct clk div4_clks[DIV4_NR] = { 166914ebf0bSMagnus Damm [DIV4_I] = DIV4(FRQCRA, 20, 0x2f7d, CLK_ENABLE_ON_INIT), 167914ebf0bSMagnus Damm [DIV4_SH] = DIV4(FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), 168914ebf0bSMagnus Damm [DIV4_B] = DIV4(FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), 169914ebf0bSMagnus Damm [DIV4_P] = DIV4(FRQCRA, 0, 0x2f7c, 0), 170914ebf0bSMagnus Damm [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), 171b621370aSMagnus Damm }; 172b621370aSMagnus Damm 173171f1bc7SKuninori Morimoto enum { DIV6_V, DIV6_I, DIV6_S, DIV6_FA, DIV6_FB, DIV6_NR }; 1744bd5d259SKuninori Morimoto 1754bd5d259SKuninori Morimoto /* Indices are important - they are the actual src selecting values */ 176171f1bc7SKuninori Morimoto static struct clk *common_parent[] = { 177171f1bc7SKuninori Morimoto [0] = &div3_clk, 178171f1bc7SKuninori Morimoto [1] = NULL, 179171f1bc7SKuninori Morimoto }; 180171f1bc7SKuninori Morimoto 181171f1bc7SKuninori Morimoto static struct clk *vclkcr_parent[8] = { 182171f1bc7SKuninori Morimoto [0] = &div3_clk, 183171f1bc7SKuninori Morimoto [2] = &sh7724_dv_clki, 184171f1bc7SKuninori Morimoto [4] = &extal_clk, 185171f1bc7SKuninori Morimoto }; 186171f1bc7SKuninori Morimoto 1874bd5d259SKuninori Morimoto static struct clk *fclkacr_parent[] = { 1884bd5d259SKuninori Morimoto [0] = &div3_clk, 1894bd5d259SKuninori Morimoto [1] = NULL, 1904bd5d259SKuninori Morimoto [2] = &sh7724_fsimcka_clk, 1914bd5d259SKuninori Morimoto [3] = NULL, 1924bd5d259SKuninori Morimoto }; 1934bd5d259SKuninori Morimoto 1944bd5d259SKuninori Morimoto static struct clk *fclkbcr_parent[] = { 1954bd5d259SKuninori Morimoto [0] = &div3_clk, 1964bd5d259SKuninori Morimoto [1] = NULL, 1974bd5d259SKuninori Morimoto [2] = &sh7724_fsimckb_clk, 1984bd5d259SKuninori Morimoto [3] = NULL, 1994bd5d259SKuninori Morimoto }; 2004bd5d259SKuninori Morimoto 201171f1bc7SKuninori Morimoto static struct clk div6_clks[DIV6_NR] = { 202171f1bc7SKuninori Morimoto [DIV6_V] = SH_CLK_DIV6_EXT(VCLKCR, 0, 203171f1bc7SKuninori Morimoto vclkcr_parent, ARRAY_SIZE(vclkcr_parent), 12, 3), 204171f1bc7SKuninori Morimoto [DIV6_I] = SH_CLK_DIV6_EXT(IRDACLKCR, 0, 205171f1bc7SKuninori Morimoto common_parent, ARRAY_SIZE(common_parent), 6, 1), 206171f1bc7SKuninori Morimoto [DIV6_S] = SH_CLK_DIV6_EXT(SPUCLKCR, CLK_ENABLE_ON_INIT, 207171f1bc7SKuninori Morimoto common_parent, ARRAY_SIZE(common_parent), 6, 1), 20856242a1fSKuninori Morimoto [DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, 0, 2094bd5d259SKuninori Morimoto fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2), 21056242a1fSKuninori Morimoto [DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, 0, 2114bd5d259SKuninori Morimoto fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2), 2124bd5d259SKuninori Morimoto }; 2134bd5d259SKuninori Morimoto 214f3d51e13SMagnus Damm static struct clk mstp_clks[HWBLK_NR] = { 2158cc88a55SGuennadi Liakhovetski [HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT), 2168cc88a55SGuennadi Liakhovetski [HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT), 2178cc88a55SGuennadi Liakhovetski [HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT), 2188cc88a55SGuennadi Liakhovetski [HWBLK_RSMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 28, CLK_ENABLE_ON_INIT), 2198cc88a55SGuennadi Liakhovetski [HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 27, CLK_ENABLE_ON_INIT), 2208cc88a55SGuennadi Liakhovetski [HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 26, CLK_ENABLE_ON_INIT), 2218cc88a55SGuennadi Liakhovetski [HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 24, CLK_ENABLE_ON_INIT), 2228cc88a55SGuennadi Liakhovetski [HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, CLK_ENABLE_ON_INIT), 2238cc88a55SGuennadi Liakhovetski [HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 21, 0), 2248cc88a55SGuennadi Liakhovetski [HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT), 2258cc88a55SGuennadi Liakhovetski [HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0), 2268cc88a55SGuennadi Liakhovetski [HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 17, 0), 2278cc88a55SGuennadi Liakhovetski [HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), 2288cc88a55SGuennadi Liakhovetski [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0), 2298cc88a55SGuennadi Liakhovetski [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0), 2308cc88a55SGuennadi Liakhovetski [HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 12, 0), 2318cc88a55SGuennadi Liakhovetski [HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0), 2328cc88a55SGuennadi Liakhovetski [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0), 2338cc88a55SGuennadi Liakhovetski [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0), 2348cc88a55SGuennadi Liakhovetski [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0), 2358cc88a55SGuennadi Liakhovetski [HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 6, 0), 2368cc88a55SGuennadi Liakhovetski [HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 5, 0), 2378cc88a55SGuennadi Liakhovetski [HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 4, 0), 2388cc88a55SGuennadi Liakhovetski [HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 2, 0), 2398cc88a55SGuennadi Liakhovetski [HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 1, 0), 240b621370aSMagnus Damm 2418cc88a55SGuennadi Liakhovetski [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 12, 0), 2428cc88a55SGuennadi Liakhovetski [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 11, 0), 2438cc88a55SGuennadi Liakhovetski [HWBLK_IIC0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0), 2448cc88a55SGuennadi Liakhovetski [HWBLK_IIC1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0), 245b621370aSMagnus Damm 2468cc88a55SGuennadi Liakhovetski [HWBLK_MMC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 29, 0), 2478cc88a55SGuennadi Liakhovetski [HWBLK_ETHER] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 28, 0), 2488cc88a55SGuennadi Liakhovetski [HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 26, 0), 2498cc88a55SGuennadi Liakhovetski [HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 25, 0), 2508cc88a55SGuennadi Liakhovetski [HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 24, 0), 2518cc88a55SGuennadi Liakhovetski [HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 22, 0), 2528cc88a55SGuennadi Liakhovetski [HWBLK_USB1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 21, 0), 2538cc88a55SGuennadi Liakhovetski [HWBLK_USB0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 20, 0), 2548cc88a55SGuennadi Liakhovetski [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 19, 0), 2558cc88a55SGuennadi Liakhovetski [HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 18, 0), 2568cc88a55SGuennadi Liakhovetski [HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 17, 0), 2578cc88a55SGuennadi Liakhovetski [HWBLK_VEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 15, 0), 2588cc88a55SGuennadi Liakhovetski [HWBLK_CEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 13, 0), 2598cc88a55SGuennadi Liakhovetski [HWBLK_BEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 12, 0), 2608cc88a55SGuennadi Liakhovetski [HWBLK_2DDMAC] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 10, 0), 2618cc88a55SGuennadi Liakhovetski [HWBLK_SPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0), 2628cc88a55SGuennadi Liakhovetski [HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0), 2638cc88a55SGuennadi Liakhovetski [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0), 2648cc88a55SGuennadi Liakhovetski [HWBLK_BEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0), 2658cc88a55SGuennadi Liakhovetski [HWBLK_CEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0), 2668cc88a55SGuennadi Liakhovetski [HWBLK_VEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0), 2678cc88a55SGuennadi Liakhovetski [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0), 2688cc88a55SGuennadi Liakhovetski [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 0, 0), 269b621370aSMagnus Damm }; 270b621370aSMagnus Damm 271f4cff0d0SPaul Mundt static struct clk_lookup lookups[] = { 272b3f9f630SMagnus Damm /* main clocks */ 273b3f9f630SMagnus Damm CLKDEV_CON_ID("rclk", &r_clk), 274b3f9f630SMagnus Damm CLKDEV_CON_ID("extal", &extal_clk), 275b3f9f630SMagnus Damm CLKDEV_CON_ID("fll_clk", &fll_clk), 276b3f9f630SMagnus Damm CLKDEV_CON_ID("pll_clk", &pll_clk), 277b3f9f630SMagnus Damm CLKDEV_CON_ID("div3_clk", &div3_clk), 278b3f9f630SMagnus Damm 2791c4cde2eSMagnus Damm /* DIV4 clocks */ 2801c4cde2eSMagnus Damm CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), 2811c4cde2eSMagnus Damm CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]), 2821c4cde2eSMagnus Damm CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]), 2831c4cde2eSMagnus Damm CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), 2841c4cde2eSMagnus Damm CLKDEV_CON_ID("vpu_clk", &div4_clks[DIV4_M1]), 2851c4cde2eSMagnus Damm 286098ec49bSMagnus Damm /* DIV6 clocks */ 287098ec49bSMagnus Damm CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), 288171f1bc7SKuninori Morimoto CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), 289171f1bc7SKuninori Morimoto CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), 290098ec49bSMagnus Damm CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), 291098ec49bSMagnus Damm CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), 292098ec49bSMagnus Damm 293fd30401bSMagnus Damm /* MSTP clocks */ 294fd30401bSMagnus Damm CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]), 295fd30401bSMagnus Damm CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]), 296fd30401bSMagnus Damm CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]), 297fd30401bSMagnus Damm CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]), 298fd30401bSMagnus Damm CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]), 299fd30401bSMagnus Damm CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]), 300fd30401bSMagnus Damm CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]), 301fd30401bSMagnus Damm CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]), 3028cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]), 303fd30401bSMagnus Damm CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]), 304fd30401bSMagnus Damm CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]), 305fd30401bSMagnus Damm CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]), 30623bcc04dSKuninori Morimoto 3071399c195SLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]), 3081399c195SLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]), 30923bcc04dSKuninori Morimoto 310d72849c3SDaniel Palmer CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[HWBLK_CMT]), 3118cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]), 3128cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]), 31323bcc04dSKuninori Morimoto 3148cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]), 3158cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]), 3168cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]), 3178cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[HWBLK_SCIF3]), 3188cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[HWBLK_SCIF4]), 3198cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[HWBLK_SCIF5]), 32023bcc04dSKuninori Morimoto 3218cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]), 3228cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]), 3238cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]), 324fd30401bSMagnus Damm CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), 3251ec353a0SKuninori Morimoto CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]), 3261ec353a0SKuninori Morimoto CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]), 3278cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]), 3289c3beaabSSergei Shtylyov CLKDEV_DEV_ID("sh7724-ether.0", &mstp_clks[HWBLK_ETHER]), 329fd30401bSMagnus Damm CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]), 330fd30401bSMagnus Damm CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]), 331fd30401bSMagnus Damm CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]), 332fd30401bSMagnus Damm CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]), 3338a87776dSKuninori Morimoto CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[HWBLK_USB1]), 3348a87776dSKuninori Morimoto CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[HWBLK_USB0]), 335d72849c3SDaniel Palmer CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]), 336d72849c3SDaniel Palmer CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]), 337fd30401bSMagnus Damm CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), 3388cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]), 3398cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]), 340fd30401bSMagnus Damm CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]), 341c2f9b05fSJacopo Mondi CLKDEV_DEV_ID("renesas-ceu.1", &mstp_clks[HWBLK_CEU1]), 342fd30401bSMagnus Damm CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]), 343fd30401bSMagnus Damm CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]), 344833218f1SKuninori Morimoto CLKDEV_DEV_ID("sh_fsi.0", &mstp_clks[HWBLK_SPU]), 345fd30401bSMagnus Damm CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]), 346e36f1b19SHans Verkuil CLKDEV_DEV_ID("sh-vou", &mstp_clks[HWBLK_VOU]), 347fd30401bSMagnus Damm CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]), 348c2f9b05fSJacopo Mondi CLKDEV_DEV_ID("renesas-ceu.0", &mstp_clks[HWBLK_CEU0]), 349fd30401bSMagnus Damm CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]), 350fd30401bSMagnus Damm CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]), 3518cc88a55SGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]), 352f4cff0d0SPaul Mundt }; 353f4cff0d0SPaul Mundt 354b621370aSMagnus Damm int __init arch_clk_init(void) 355b621370aSMagnus Damm { 356b621370aSMagnus Damm int k, ret = 0; 357b621370aSMagnus Damm 358b621370aSMagnus Damm /* autodetect extal or fll configuration */ 359b621370aSMagnus Damm if (__raw_readl(PLLCR) & 0x1000) 360b621370aSMagnus Damm pll_clk.parent = &fll_clk; 361b621370aSMagnus Damm else 362b621370aSMagnus Damm pll_clk.parent = &extal_clk; 363b621370aSMagnus Damm 364b621370aSMagnus Damm for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 365b621370aSMagnus Damm ret = clk_register(main_clks[k]); 366b621370aSMagnus Damm 367f4cff0d0SPaul Mundt clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 368f4cff0d0SPaul Mundt 369b621370aSMagnus Damm if (!ret) 370b621370aSMagnus Damm ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 371b621370aSMagnus Damm 372b621370aSMagnus Damm if (!ret) 373171f1bc7SKuninori Morimoto ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); 3744bd5d259SKuninori Morimoto 3754bd5d259SKuninori Morimoto if (!ret) 376ad3337cbSNobuhiro Iwamatsu ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR); 377b621370aSMagnus Damm 378b621370aSMagnus Damm return ret; 379b621370aSMagnus Damm } 380