1bc49b6eaSMagnus Damm /* 2bc49b6eaSMagnus Damm * arch/sh/kernel/cpu/sh4a/clock-sh7343.c 3bc49b6eaSMagnus Damm * 4bc49b6eaSMagnus Damm * SH7343 clock framework support 5bc49b6eaSMagnus Damm * 6bc49b6eaSMagnus Damm * Copyright (C) 2009 Magnus Damm 7bc49b6eaSMagnus Damm * 8bc49b6eaSMagnus Damm * This program is free software; you can redistribute it and/or modify 9bc49b6eaSMagnus Damm * it under the terms of the GNU General Public License as published by 10bc49b6eaSMagnus Damm * the Free Software Foundation; either version 2 of the License 11bc49b6eaSMagnus Damm * 12bc49b6eaSMagnus Damm * This program is distributed in the hope that it will be useful, 13bc49b6eaSMagnus Damm * but WITHOUT ANY WARRANTY; without even the implied warranty of 14bc49b6eaSMagnus Damm * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15bc49b6eaSMagnus Damm * GNU General Public License for more details. 16bc49b6eaSMagnus Damm * 17bc49b6eaSMagnus Damm * You should have received a copy of the GNU General Public License 18bc49b6eaSMagnus Damm * along with this program; if not, write to the Free Software 19bc49b6eaSMagnus Damm * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20bc49b6eaSMagnus Damm */ 21bc49b6eaSMagnus Damm #include <linux/init.h> 22bc49b6eaSMagnus Damm #include <linux/kernel.h> 23bc49b6eaSMagnus Damm #include <linux/io.h> 246d803ba7SJean-Christop PLAGNIOL-VILLARD #include <linux/clkdev.h> 25bc49b6eaSMagnus Damm #include <asm/clock.h> 26bc49b6eaSMagnus Damm 27bc49b6eaSMagnus Damm /* SH7343 registers */ 28bc49b6eaSMagnus Damm #define FRQCR 0xa4150000 29bc49b6eaSMagnus Damm #define VCLKCR 0xa4150004 30bc49b6eaSMagnus Damm #define SCLKACR 0xa4150008 31bc49b6eaSMagnus Damm #define SCLKBCR 0xa415000c 32bc49b6eaSMagnus Damm #define PLLCR 0xa4150024 33bc49b6eaSMagnus Damm #define MSTPCR0 0xa4150030 34bc49b6eaSMagnus Damm #define MSTPCR1 0xa4150034 35bc49b6eaSMagnus Damm #define MSTPCR2 0xa4150038 36bc49b6eaSMagnus Damm #define DLLFRQ 0xa4150050 37bc49b6eaSMagnus Damm 38bc49b6eaSMagnus Damm /* Fixed 32 KHz root clock for RTC and Power Management purposes */ 39bc49b6eaSMagnus Damm static struct clk r_clk = { 40bc49b6eaSMagnus Damm .rate = 32768, 41bc49b6eaSMagnus Damm }; 42bc49b6eaSMagnus Damm 43bc49b6eaSMagnus Damm /* 44bc49b6eaSMagnus Damm * Default rate for the root input clock, reset this with clk_set_rate() 45bc49b6eaSMagnus Damm * from the platform code. 46bc49b6eaSMagnus Damm */ 47bc49b6eaSMagnus Damm struct clk extal_clk = { 48bc49b6eaSMagnus Damm .rate = 33333333, 49bc49b6eaSMagnus Damm }; 50bc49b6eaSMagnus Damm 51bc49b6eaSMagnus Damm /* The dll block multiplies the 32khz r_clk, may be used instead of extal */ 52bc49b6eaSMagnus Damm static unsigned long dll_recalc(struct clk *clk) 53bc49b6eaSMagnus Damm { 54bc49b6eaSMagnus Damm unsigned long mult; 55bc49b6eaSMagnus Damm 56bc49b6eaSMagnus Damm if (__raw_readl(PLLCR) & 0x1000) 57bc49b6eaSMagnus Damm mult = __raw_readl(DLLFRQ); 58bc49b6eaSMagnus Damm else 59bc49b6eaSMagnus Damm mult = 0; 60bc49b6eaSMagnus Damm 61bc49b6eaSMagnus Damm return clk->parent->rate * mult; 62bc49b6eaSMagnus Damm } 63bc49b6eaSMagnus Damm 6433cb61a4SMagnus Damm static struct sh_clk_ops dll_clk_ops = { 65bc49b6eaSMagnus Damm .recalc = dll_recalc, 66bc49b6eaSMagnus Damm }; 67bc49b6eaSMagnus Damm 68bc49b6eaSMagnus Damm static struct clk dll_clk = { 69bc49b6eaSMagnus Damm .ops = &dll_clk_ops, 70bc49b6eaSMagnus Damm .parent = &r_clk, 71bc49b6eaSMagnus Damm .flags = CLK_ENABLE_ON_INIT, 72bc49b6eaSMagnus Damm }; 73bc49b6eaSMagnus Damm 74bc49b6eaSMagnus Damm static unsigned long pll_recalc(struct clk *clk) 75bc49b6eaSMagnus Damm { 76bc49b6eaSMagnus Damm unsigned long mult = 1; 77bc49b6eaSMagnus Damm 78bc49b6eaSMagnus Damm if (__raw_readl(PLLCR) & 0x4000) 79bc49b6eaSMagnus Damm mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1); 80bc49b6eaSMagnus Damm 81bc49b6eaSMagnus Damm return clk->parent->rate * mult; 82bc49b6eaSMagnus Damm } 83bc49b6eaSMagnus Damm 8433cb61a4SMagnus Damm static struct sh_clk_ops pll_clk_ops = { 85bc49b6eaSMagnus Damm .recalc = pll_recalc, 86bc49b6eaSMagnus Damm }; 87bc49b6eaSMagnus Damm 88bc49b6eaSMagnus Damm static struct clk pll_clk = { 89bc49b6eaSMagnus Damm .ops = &pll_clk_ops, 90bc49b6eaSMagnus Damm .flags = CLK_ENABLE_ON_INIT, 91bc49b6eaSMagnus Damm }; 92bc49b6eaSMagnus Damm 93bc49b6eaSMagnus Damm struct clk *main_clks[] = { 94bc49b6eaSMagnus Damm &r_clk, 95bc49b6eaSMagnus Damm &extal_clk, 96bc49b6eaSMagnus Damm &dll_clk, 97bc49b6eaSMagnus Damm &pll_clk, 98bc49b6eaSMagnus Damm }; 99bc49b6eaSMagnus Damm 100bc49b6eaSMagnus Damm static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 101bc49b6eaSMagnus Damm static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 102bc49b6eaSMagnus Damm 1030a5f337eSMagnus Damm static struct clk_div_mult_table div4_div_mult_table = { 104bc49b6eaSMagnus Damm .divisors = divisors, 105bc49b6eaSMagnus Damm .nr_divisors = ARRAY_SIZE(divisors), 106bc49b6eaSMagnus Damm .multipliers = multipliers, 107bc49b6eaSMagnus Damm .nr_multipliers = ARRAY_SIZE(multipliers), 108bc49b6eaSMagnus Damm }; 109bc49b6eaSMagnus Damm 1100a5f337eSMagnus Damm static struct clk_div4_table div4_table = { 1110a5f337eSMagnus Damm .div_mult_table = &div4_div_mult_table, 1120a5f337eSMagnus Damm }; 1130a5f337eSMagnus Damm 114bc49b6eaSMagnus Damm enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, 115bc49b6eaSMagnus Damm DIV4_SIUA, DIV4_SIUB, DIV4_NR }; 116bc49b6eaSMagnus Damm 117914ebf0bSMagnus Damm #define DIV4(_reg, _bit, _mask, _flags) \ 118914ebf0bSMagnus Damm SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags) 119bc49b6eaSMagnus Damm 120bc49b6eaSMagnus Damm struct clk div4_clks[DIV4_NR] = { 121914ebf0bSMagnus Damm [DIV4_I] = DIV4(FRQCR, 20, 0x1fff, CLK_ENABLE_ON_INIT), 122914ebf0bSMagnus Damm [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT), 123914ebf0bSMagnus Damm [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT), 124914ebf0bSMagnus Damm [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT), 125914ebf0bSMagnus Damm [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT), 126914ebf0bSMagnus Damm [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0), 127914ebf0bSMagnus Damm [DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0), 128914ebf0bSMagnus Damm [DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0), 129bc49b6eaSMagnus Damm }; 130bc49b6eaSMagnus Damm 131098ec49bSMagnus Damm enum { DIV6_V, DIV6_NR }; 132098ec49bSMagnus Damm 133098ec49bSMagnus Damm struct clk div6_clks[DIV6_NR] = { 1349e1985e1SMagnus Damm [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0), 135bc49b6eaSMagnus Damm }; 136bc49b6eaSMagnus Damm 137c77a9c3eSMagnus Damm #define MSTP(_parent, _reg, _bit, _flags) \ 138c77a9c3eSMagnus Damm SH_CLK_MSTP32(_parent, _reg, _bit, _flags) 139bc49b6eaSMagnus Damm 140e8b96918SMagnus Damm enum { MSTP031, MSTP030, MSTP029, MSTP028, MSTP026, 141e8b96918SMagnus Damm MSTP023, MSTP022, MSTP021, MSTP020, MSTP019, MSTP018, MSTP017, MSTP016, 142e8b96918SMagnus Damm MSTP015, MSTP014, MSTP013, MSTP012, MSTP011, MSTP010, 143e8b96918SMagnus Damm MSTP007, MSTP006, MSTP005, MSTP004, MSTP003, MSTP002, MSTP001, 144e8b96918SMagnus Damm MSTP109, MSTP108, MSTP100, 145e8b96918SMagnus Damm MSTP225, MSTP224, MSTP218, MSTP217, MSTP216, 146e8b96918SMagnus Damm MSTP214, MSTP213, MSTP212, MSTP211, MSTP208, 147e8b96918SMagnus Damm MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 148e8b96918SMagnus Damm MSTP_NR }; 149bc49b6eaSMagnus Damm 150e8b96918SMagnus Damm static struct clk mstp_clks[MSTP_NR] = { 151c77a9c3eSMagnus Damm [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT), 152c77a9c3eSMagnus Damm [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT), 153c77a9c3eSMagnus Damm [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT), 154c77a9c3eSMagnus Damm [MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT), 155c77a9c3eSMagnus Damm [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), 156c77a9c3eSMagnus Damm [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0), 157c77a9c3eSMagnus Damm [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0), 158c77a9c3eSMagnus Damm [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0), 159c77a9c3eSMagnus Damm [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0), 160c77a9c3eSMagnus Damm [MSTP019] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 19, 0), 161c77a9c3eSMagnus Damm [MSTP017] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 17, 0), 162c77a9c3eSMagnus Damm [MSTP015] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 15, 0), 163c77a9c3eSMagnus Damm [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0), 164c77a9c3eSMagnus Damm [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0), 165c77a9c3eSMagnus Damm [MSTP011] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 11, 0), 166c77a9c3eSMagnus Damm [MSTP010] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 10, 0), 167c77a9c3eSMagnus Damm [MSTP007] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 7, 0), 168c77a9c3eSMagnus Damm [MSTP006] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 6, 0), 169c77a9c3eSMagnus Damm [MSTP005] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 5, 0), 170c77a9c3eSMagnus Damm [MSTP004] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 4, 0), 171c77a9c3eSMagnus Damm [MSTP003] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 3, 0), 172c77a9c3eSMagnus Damm [MSTP002] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 2, 0), 173c77a9c3eSMagnus Damm [MSTP001] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 1, 0), 174bc49b6eaSMagnus Damm 175c77a9c3eSMagnus Damm [MSTP109] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 9, 0), 176c77a9c3eSMagnus Damm [MSTP108] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 8, 0), 177e8b96918SMagnus Damm 178c77a9c3eSMagnus Damm [MSTP225] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 25, 0), 179c77a9c3eSMagnus Damm [MSTP224] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 24, 0), 180c77a9c3eSMagnus Damm [MSTP218] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 18, 0), 181c77a9c3eSMagnus Damm [MSTP217] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 17, 0), 182c77a9c3eSMagnus Damm [MSTP216] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 16, 0), 183c77a9c3eSMagnus Damm [MSTP214] = MSTP(&r_clk, MSTPCR2, 14, 0), 184c77a9c3eSMagnus Damm [MSTP213] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 13, 0), 185c77a9c3eSMagnus Damm [MSTP212] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 12, 0), 186c77a9c3eSMagnus Damm [MSTP211] = MSTP(&div4_clks[DIV4_P], MSTPCR2, 11, 0), 187c77a9c3eSMagnus Damm [MSTP208] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 8, 0), 188c77a9c3eSMagnus Damm [MSTP206] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT), 189c77a9c3eSMagnus Damm [MSTP205] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 5, 0), 190c77a9c3eSMagnus Damm [MSTP204] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 4, 0), 191c77a9c3eSMagnus Damm [MSTP203] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 3, 0), 192c77a9c3eSMagnus Damm [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT), 193c77a9c3eSMagnus Damm [MSTP201] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT), 194c77a9c3eSMagnus Damm [MSTP200] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 0, 0), 195bc49b6eaSMagnus Damm }; 196bc49b6eaSMagnus Damm 197098ec49bSMagnus Damm static struct clk_lookup lookups[] = { 1988249a311SMagnus Damm /* main clocks */ 1998249a311SMagnus Damm CLKDEV_CON_ID("rclk", &r_clk), 2008249a311SMagnus Damm CLKDEV_CON_ID("extal", &extal_clk), 2018249a311SMagnus Damm CLKDEV_CON_ID("dll_clk", &dll_clk), 2028249a311SMagnus Damm CLKDEV_CON_ID("pll_clk", &pll_clk), 2038249a311SMagnus Damm 204f8ef178cSMagnus Damm /* DIV4 clocks */ 205f8ef178cSMagnus Damm CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), 206f8ef178cSMagnus Damm CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]), 207f8ef178cSMagnus Damm CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]), 208f8ef178cSMagnus Damm CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]), 209f8ef178cSMagnus Damm CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]), 210f8ef178cSMagnus Damm CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), 211f8ef178cSMagnus Damm CLKDEV_CON_ID("siua_clk", &div4_clks[DIV4_SIUA]), 212f8ef178cSMagnus Damm CLKDEV_CON_ID("siub_clk", &div4_clks[DIV4_SIUB]), 213f8ef178cSMagnus Damm 214098ec49bSMagnus Damm /* DIV6 clocks */ 215098ec49bSMagnus Damm CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), 21625637f7aSMagnus Damm 21725637f7aSMagnus Damm /* MSTP32 clocks */ 21825637f7aSMagnus Damm CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]), 21925637f7aSMagnus Damm CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]), 22025637f7aSMagnus Damm CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]), 22125637f7aSMagnus Damm CLKDEV_CON_ID("uram0", &mstp_clks[MSTP028]), 22225637f7aSMagnus Damm CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]), 22325637f7aSMagnus Damm CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]), 22425637f7aSMagnus Damm CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]), 22525637f7aSMagnus Damm CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]), 22625637f7aSMagnus Damm CLKDEV_CON_ID("sh0", &mstp_clks[MSTP020]), 22725637f7aSMagnus Damm CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]), 22825637f7aSMagnus Damm CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]), 22925637f7aSMagnus Damm CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]), 2309b17e48cSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[MSTP014]), 23125637f7aSMagnus Damm CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]), 23225637f7aSMagnus Damm CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]), 23325637f7aSMagnus Damm CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]), 234074fcdffSKuninori Morimoto 235fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP007]), 236fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP006]), 237fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP005]), 238fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP004]), 239074fcdffSKuninori Morimoto 24025637f7aSMagnus Damm CLKDEV_CON_ID("sio0", &mstp_clks[MSTP003]), 24125637f7aSMagnus Damm CLKDEV_CON_ID("siof0", &mstp_clks[MSTP002]), 24225637f7aSMagnus Damm CLKDEV_CON_ID("siof1", &mstp_clks[MSTP001]), 24336d1753aSKuninori Morimoto CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP109]), 24436d1753aSKuninori Morimoto CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP108]), 24525637f7aSMagnus Damm CLKDEV_CON_ID("tpu0", &mstp_clks[MSTP225]), 24625637f7aSMagnus Damm CLKDEV_CON_ID("irda0", &mstp_clks[MSTP224]), 24725637f7aSMagnus Damm CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP218]), 24825637f7aSMagnus Damm CLKDEV_CON_ID("mmcif0", &mstp_clks[MSTP217]), 24925637f7aSMagnus Damm CLKDEV_CON_ID("sim0", &mstp_clks[MSTP216]), 25025637f7aSMagnus Damm CLKDEV_CON_ID("keysc0", &mstp_clks[MSTP214]), 25125637f7aSMagnus Damm CLKDEV_CON_ID("tsif0", &mstp_clks[MSTP213]), 25225637f7aSMagnus Damm CLKDEV_CON_ID("s3d40", &mstp_clks[MSTP212]), 25325637f7aSMagnus Damm CLKDEV_CON_ID("usbf0", &mstp_clks[MSTP211]), 25425637f7aSMagnus Damm CLKDEV_CON_ID("siu0", &mstp_clks[MSTP208]), 25525637f7aSMagnus Damm CLKDEV_CON_ID("jpu0", &mstp_clks[MSTP206]), 25625637f7aSMagnus Damm CLKDEV_CON_ID("vou0", &mstp_clks[MSTP205]), 25725637f7aSMagnus Damm CLKDEV_CON_ID("beu0", &mstp_clks[MSTP204]), 25825637f7aSMagnus Damm CLKDEV_CON_ID("ceu0", &mstp_clks[MSTP203]), 25925637f7aSMagnus Damm CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]), 26025637f7aSMagnus Damm CLKDEV_CON_ID("vpu0", &mstp_clks[MSTP201]), 26125637f7aSMagnus Damm CLKDEV_CON_ID("lcdc0", &mstp_clks[MSTP200]), 262098ec49bSMagnus Damm }; 263098ec49bSMagnus Damm 264bc49b6eaSMagnus Damm int __init arch_clk_init(void) 265bc49b6eaSMagnus Damm { 266bc49b6eaSMagnus Damm int k, ret = 0; 267bc49b6eaSMagnus Damm 268bc49b6eaSMagnus Damm /* autodetect extal or dll configuration */ 269bc49b6eaSMagnus Damm if (__raw_readl(PLLCR) & 0x1000) 270bc49b6eaSMagnus Damm pll_clk.parent = &dll_clk; 271bc49b6eaSMagnus Damm else 272bc49b6eaSMagnus Damm pll_clk.parent = &extal_clk; 273bc49b6eaSMagnus Damm 274bc49b6eaSMagnus Damm for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 275bc49b6eaSMagnus Damm ret = clk_register(main_clks[k]); 276bc49b6eaSMagnus Damm 277098ec49bSMagnus Damm clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 278098ec49bSMagnus Damm 279bc49b6eaSMagnus Damm if (!ret) 280bc49b6eaSMagnus Damm ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 281bc49b6eaSMagnus Damm 282bc49b6eaSMagnus Damm if (!ret) 283098ec49bSMagnus Damm ret = sh_clk_div6_register(div6_clks, DIV6_NR); 284bc49b6eaSMagnus Damm 285bc49b6eaSMagnus Damm if (!ret) 286ad3337cbSNobuhiro Iwamatsu ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); 287bc49b6eaSMagnus Damm 288bc49b6eaSMagnus Damm return ret; 289bc49b6eaSMagnus Damm } 290