1 /* 2 * SH7760 Setup 3 * 4 * Copyright (C) 2006 Paul Mundt 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 #include <linux/platform_device.h> 11 #include <linux/init.h> 12 #include <linux/serial.h> 13 #include <asm/sci.h> 14 15 static struct plat_sci_port sci_platform_data[] = { 16 { 17 .mapbase = 0xfe600000, 18 .flags = UPF_BOOT_AUTOCONF, 19 .type = PORT_SCIF, 20 .irqs = { 52, 53, 55, 54 }, 21 }, { 22 .mapbase = 0xfe610000, 23 .flags = UPF_BOOT_AUTOCONF, 24 .type = PORT_SCIF, 25 .irqs = { 72, 73, 75, 74 }, 26 }, { 27 .mapbase = 0xfe620000, 28 .flags = UPF_BOOT_AUTOCONF, 29 .type = PORT_SCIF, 30 .irqs = { 76, 77, 79, 78 }, 31 }, { 32 .flags = 0, 33 } 34 }; 35 36 static struct platform_device sci_device = { 37 .name = "sh-sci", 38 .id = -1, 39 .dev = { 40 .platform_data = sci_platform_data, 41 }, 42 }; 43 44 static struct platform_device *sh7760_devices[] __initdata = { 45 &sci_device, 46 }; 47 48 static int __init sh7760_devices_setup(void) 49 { 50 return platform_add_devices(sh7760_devices, 51 ARRAY_SIZE(sh7760_devices)); 52 } 53 __initcall(sh7760_devices_setup); 54 55 static struct intc2_data intc2_irq_table[] = { 56 {48, 0, 28, 0, 31, 3}, /* IRQ 4 */ 57 {49, 0, 24, 0, 30, 3}, /* IRQ 3 */ 58 {50, 0, 20, 0, 29, 3}, /* IRQ 2 */ 59 {51, 0, 16, 0, 28, 3}, /* IRQ 1 */ 60 {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */ 61 {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */ 62 {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */ 63 {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */ 64 {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */ 65 {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */ 66 {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */ 67 {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */ 68 {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */ 69 {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */ 70 {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */ 71 {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */ 72 {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */ 73 {65, 8, 24, 0, 16, 3}, /* LCDC */ 74 {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */ 75 {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */ 76 {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */ 77 {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */ 78 {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */ 79 {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */ 80 {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */ 81 {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */ 82 {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */ 83 {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */ 84 {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */ 85 {80, 8, 4, 4, 23, 3}, /* SIM_ERI */ 86 {81, 8, 4, 4, 22, 3}, /* SIM_RXI */ 87 {82, 8, 4, 4, 21, 3}, /* SIM_TXI */ 88 {83, 8, 4, 4, 20, 3}, /* SIM_TEI */ 89 {84, 8, 0, 4, 19, 3}, /* HSPII */ 90 {88, 12, 20, 4, 18, 3}, /* MMCI0 */ 91 {89, 12, 20, 4, 17, 3}, /* MMCI1 */ 92 {90, 12, 20, 4, 16, 3}, /* MMCI2 */ 93 {91, 12, 20, 4, 15, 3}, /* MMCI3 */ 94 {92, 12, 12, 4, 6, 3}, /* MFI */ 95 {108,12, 4, 4, 1, 3}, /* ADC */ 96 {109,12, 0, 4, 0, 3}, /* CMTI */ 97 }; 98 99 static struct ipr_data sh7760_ipr_map[] = { 100 /* IRQ, IPR-idx, shift, priority */ 101 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 102 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 103 { 18, 0, 4, 2 }, /* TMU2 TUNI */ 104 { 19, 0, 4, 2 }, /* TMU2 TIPCI */ 105 { 27, 1, 12, 2 }, /* WDT ITI */ 106 { 28, 1, 8, 2 }, /* REF RCMI */ 107 { 29, 1, 8, 2 }, /* REF ROVI */ 108 { 32, 2, 0, 7 }, /* HUDI */ 109 { 33, 2, 12, 7 }, /* GPIOI */ 110 { 34, 2, 8, 7 }, /* DMAC DMTE0 */ 111 { 35, 2, 8, 7 }, /* DMAC DMTE1 */ 112 { 36, 2, 8, 7 }, /* DMAC DMTE2 */ 113 { 37, 2, 8, 7 }, /* DMAC DMTE3 */ 114 { 38, 2, 8, 7 }, /* DMAC DMAE */ 115 { 44, 2, 8, 7 }, /* DMAC DMTE4 */ 116 { 45, 2, 8, 7 }, /* DMAC DMTE5 */ 117 { 46, 2, 8, 7 }, /* DMAC DMTE6 */ 118 { 47, 2, 8, 7 }, /* DMAC DMTE7 */ 119 /* these here are only valid if INTC_ICR bit 7 is set to 1! 120 * XXX: maybe CONFIG_SH_IRLMODE symbol? SH7751 could use it too */ 121 #if 0 122 { 2, 3, 12, 3 }, /* IRL0 */ 123 { 5, 3, 8, 3 }, /* IRL1 */ 124 { 8, 3, 4, 3 }, /* IRL2 */ 125 { 11, 3, 0, 3 }, /* IRL3 */ 126 #endif 127 }; 128 129 static unsigned long ipr_offsets[] = { 130 0xffd00004UL, /* 0: IPRA */ 131 0xffd00008UL, /* 1: IPRB */ 132 0xffd0000cUL, /* 2: IPRC */ 133 0xffd00010UL, /* 3: IPRD */ 134 }; 135 136 /* given the IPR index return the address of the IPR register */ 137 unsigned int map_ipridx_to_addr(int idx) 138 { 139 if (idx >= ARRAY_SIZE(ipr_offsets)) 140 return 0; 141 return ipr_offsets[idx]; 142 } 143 144 void __init init_IRQ_intc2(void) 145 { 146 make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table)); 147 } 148 149 void __init init_IRQ_ipr(void) 150 { 151 make_ipr_irq(sh7760_ipr_map, ARRAY_SIZE(sh7760_ipr_map)); 152 } 153