1 /* 2 * SH4-202 Setup 3 * 4 * Copyright (C) 2006 Paul Mundt 5 * Copyright (C) 2009 Magnus Damm 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11 #include <linux/platform_device.h> 12 #include <linux/init.h> 13 #include <linux/serial.h> 14 #include <linux/serial_sci.h> 15 #include <linux/sh_timer.h> 16 #include <linux/sh_intc.h> 17 #include <linux/io.h> 18 19 static struct plat_sci_port scif0_platform_data = { 20 .scscr = SCSCR_REIE, 21 .type = PORT_SCIF, 22 }; 23 24 static struct resource scif0_resources[] = { 25 DEFINE_RES_MEM(0xffe80000, 0x100), 26 DEFINE_RES_IRQ(evt2irq(0x700)), 27 DEFINE_RES_IRQ(evt2irq(0x720)), 28 DEFINE_RES_IRQ(evt2irq(0x760)), 29 DEFINE_RES_IRQ(evt2irq(0x740)), 30 }; 31 32 static struct platform_device scif0_device = { 33 .name = "sh-sci", 34 .id = 0, 35 .resource = scif0_resources, 36 .num_resources = ARRAY_SIZE(scif0_resources), 37 .dev = { 38 .platform_data = &scif0_platform_data, 39 }, 40 }; 41 42 static struct sh_timer_config tmu0_platform_data = { 43 .channels_mask = 7, 44 }; 45 46 static struct resource tmu0_resources[] = { 47 DEFINE_RES_MEM(0xffd80000, 0x30), 48 DEFINE_RES_IRQ(evt2irq(0x400)), 49 DEFINE_RES_IRQ(evt2irq(0x420)), 50 DEFINE_RES_IRQ(evt2irq(0x440)), 51 }; 52 53 static struct platform_device tmu0_device = { 54 .name = "sh-tmu", 55 .id = 0, 56 .dev = { 57 .platform_data = &tmu0_platform_data, 58 }, 59 .resource = tmu0_resources, 60 .num_resources = ARRAY_SIZE(tmu0_resources), 61 }; 62 63 static struct platform_device *sh4202_devices[] __initdata = { 64 &scif0_device, 65 &tmu0_device, 66 }; 67 68 static int __init sh4202_devices_setup(void) 69 { 70 return platform_add_devices(sh4202_devices, 71 ARRAY_SIZE(sh4202_devices)); 72 } 73 arch_initcall(sh4202_devices_setup); 74 75 static struct platform_device *sh4202_early_devices[] __initdata = { 76 &scif0_device, 77 &tmu0_device, 78 }; 79 80 void __init plat_early_device_setup(void) 81 { 82 early_platform_add_devices(sh4202_early_devices, 83 ARRAY_SIZE(sh4202_early_devices)); 84 } 85 86 enum { 87 UNUSED = 0, 88 89 /* interrupt sources */ 90 IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */ 91 HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT, 92 }; 93 94 static struct intc_vect vectors[] __initdata = { 95 INTC_VECT(HUDI, 0x600), 96 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 97 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460), 98 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), 99 INTC_VECT(RTC, 0x4c0), 100 INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720), 101 INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760), 102 INTC_VECT(WDT, 0x560), 103 }; 104 105 static struct intc_prio_reg prio_registers[] __initdata = { 106 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 107 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } }, 108 { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } }, 109 { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } }, 110 }; 111 112 static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL, 113 NULL, prio_registers, NULL); 114 115 static struct intc_vect vectors_irlm[] __initdata = { 116 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0), 117 INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360), 118 }; 119 120 static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL, 121 NULL, prio_registers, NULL); 122 123 void __init plat_irq_setup(void) 124 { 125 register_intc_controller(&intc_desc); 126 } 127 128 #define INTC_ICR 0xffd00000UL 129 #define INTC_ICR_IRLM (1<<7) 130 131 void __init plat_irq_setup_pins(int mode) 132 { 133 switch (mode) { 134 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 135 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 136 register_intc_controller(&intc_desc_irlm); 137 break; 138 default: 139 BUG(); 140 } 141 } 142