1 /* 2 * SH7705 Setup 3 * 4 * Copyright (C) 2006 - 2009 Paul Mundt 5 * Copyright (C) 2007 Nobuhiro Iwamatsu 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11 #include <linux/platform_device.h> 12 #include <linux/init.h> 13 #include <linux/irq.h> 14 #include <linux/serial.h> 15 #include <linux/serial_sci.h> 16 #include <linux/sh_timer.h> 17 #include <asm/rtc.h> 18 19 enum { 20 UNUSED = 0, 21 22 /* interrupt sources */ 23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, 24 PINT07, PINT815, 25 26 DMAC, SCIF0, SCIF2, ADC_ADI, USB, 27 28 TPU0, TPU1, TPU2, TPU3, 29 TMU0, TMU1, TMU2, 30 31 RTC, WDT, REF_RCMI, 32 }; 33 34 static struct intc_vect vectors[] __initdata = { 35 /* IRQ0->5 are handled in setup-sh3.c */ 36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), 37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820), 38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860), 39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0), 40 INTC_VECT(SCIF0, 0x8e0), 41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920), 42 INTC_VECT(SCIF2, 0x960), 43 INTC_VECT(ADC_ADI, 0x980), 44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40), 45 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), 46 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0), 47 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 48 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460), 49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), 50 INTC_VECT(RTC, 0x4c0), 51 INTC_VECT(WDT, 0x560), 52 INTC_VECT(REF_RCMI, 0x580), 53 }; 54 55 static struct intc_prio_reg prio_registers[] __initdata = { 56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 57 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, 58 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 59 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } }, 60 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } }, 61 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } }, 62 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } }, 63 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } }, 64 65 }; 66 67 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL, 68 NULL, prio_registers, NULL); 69 70 static struct plat_sci_port sci_platform_data[] = { 71 { 72 .mapbase = 0xa4410000, 73 .flags = UPF_BOOT_AUTOCONF, 74 .type = PORT_SCIF, 75 .irqs = { 56, 56, 56 }, 76 }, { 77 .mapbase = 0xa4400000, 78 .flags = UPF_BOOT_AUTOCONF, 79 .type = PORT_SCIF, 80 .irqs = { 52, 52, 52 }, 81 }, { 82 .flags = 0, 83 } 84 }; 85 86 static struct platform_device sci_device = { 87 .name = "sh-sci", 88 .id = -1, 89 .dev = { 90 .platform_data = sci_platform_data, 91 }, 92 }; 93 94 static struct resource rtc_resources[] = { 95 [0] = { 96 .start = 0xfffffec0, 97 .end = 0xfffffec0 + 0x1e, 98 .flags = IORESOURCE_IO, 99 }, 100 [1] = { 101 .start = 20, 102 .flags = IORESOURCE_IRQ, 103 }, 104 }; 105 106 static struct sh_rtc_platform_info rtc_info = { 107 .capabilities = RTC_CAP_4_DIGIT_YEAR, 108 }; 109 110 static struct platform_device rtc_device = { 111 .name = "sh-rtc", 112 .id = -1, 113 .num_resources = ARRAY_SIZE(rtc_resources), 114 .resource = rtc_resources, 115 .dev = { 116 .platform_data = &rtc_info, 117 }, 118 }; 119 120 static struct sh_timer_config tmu0_platform_data = { 121 .name = "TMU0", 122 .channel_offset = 0x02, 123 .timer_bit = 0, 124 .clk = "peripheral_clk", 125 .clockevent_rating = 200, 126 }; 127 128 static struct resource tmu0_resources[] = { 129 [0] = { 130 .name = "TMU0", 131 .start = 0xfffffe94, 132 .end = 0xfffffe9f, 133 .flags = IORESOURCE_MEM, 134 }, 135 [1] = { 136 .start = 16, 137 .flags = IORESOURCE_IRQ, 138 }, 139 }; 140 141 static struct platform_device tmu0_device = { 142 .name = "sh_tmu", 143 .id = 0, 144 .dev = { 145 .platform_data = &tmu0_platform_data, 146 }, 147 .resource = tmu0_resources, 148 .num_resources = ARRAY_SIZE(tmu0_resources), 149 }; 150 151 static struct sh_timer_config tmu1_platform_data = { 152 .name = "TMU1", 153 .channel_offset = 0xe, 154 .timer_bit = 1, 155 .clk = "peripheral_clk", 156 .clocksource_rating = 200, 157 }; 158 159 static struct resource tmu1_resources[] = { 160 [0] = { 161 .name = "TMU1", 162 .start = 0xfffffea0, 163 .end = 0xfffffeab, 164 .flags = IORESOURCE_MEM, 165 }, 166 [1] = { 167 .start = 17, 168 .flags = IORESOURCE_IRQ, 169 }, 170 }; 171 172 static struct platform_device tmu1_device = { 173 .name = "sh_tmu", 174 .id = 1, 175 .dev = { 176 .platform_data = &tmu1_platform_data, 177 }, 178 .resource = tmu1_resources, 179 .num_resources = ARRAY_SIZE(tmu1_resources), 180 }; 181 182 static struct sh_timer_config tmu2_platform_data = { 183 .name = "TMU2", 184 .channel_offset = 0x1a, 185 .timer_bit = 2, 186 .clk = "peripheral_clk", 187 }; 188 189 static struct resource tmu2_resources[] = { 190 [0] = { 191 .name = "TMU2", 192 .start = 0xfffffeac, 193 .end = 0xfffffebb, 194 .flags = IORESOURCE_MEM, 195 }, 196 [1] = { 197 .start = 18, 198 .flags = IORESOURCE_IRQ, 199 }, 200 }; 201 202 static struct platform_device tmu2_device = { 203 .name = "sh_tmu", 204 .id = 2, 205 .dev = { 206 .platform_data = &tmu2_platform_data, 207 }, 208 .resource = tmu2_resources, 209 .num_resources = ARRAY_SIZE(tmu2_resources), 210 }; 211 212 static struct platform_device *sh7705_devices[] __initdata = { 213 &tmu0_device, 214 &tmu1_device, 215 &tmu2_device, 216 &sci_device, 217 &rtc_device, 218 }; 219 220 static int __init sh7705_devices_setup(void) 221 { 222 return platform_add_devices(sh7705_devices, 223 ARRAY_SIZE(sh7705_devices)); 224 } 225 arch_initcall(sh7705_devices_setup); 226 227 static struct platform_device *sh7705_early_devices[] __initdata = { 228 &tmu0_device, 229 &tmu1_device, 230 &tmu2_device, 231 }; 232 233 void __init plat_early_device_setup(void) 234 { 235 early_platform_add_devices(sh7705_early_devices, 236 ARRAY_SIZE(sh7705_early_devices)); 237 } 238 239 void __init plat_irq_setup(void) 240 { 241 register_intc_controller(&intc_desc); 242 plat_irq_setup_sh3(); 243 } 244