xref: /openbmc/linux/arch/sh/kernel/cpu/sh3/setup-sh7705.c (revision 60772e48)
1 /*
2  * SH7705 Setup
3  *
4  *  Copyright (C) 2006 - 2009  Paul Mundt
5  *  Copyright (C) 2007  Nobuhiro Iwamatsu
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file "COPYING" in the main directory of this archive
9  * for more details.
10  */
11 #include <linux/platform_device.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/serial.h>
15 #include <linux/serial_sci.h>
16 #include <linux/sh_timer.h>
17 #include <linux/sh_intc.h>
18 #include <asm/rtc.h>
19 #include <cpu/serial.h>
20 
21 enum {
22 	UNUSED = 0,
23 
24 	/* interrupt sources */
25 	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
26 	PINT07, PINT815,
27 
28 	DMAC, SCIF0, SCIF2, ADC_ADI, USB,
29 
30 	TPU0, TPU1, TPU2, TPU3,
31 	TMU0, TMU1, TMU2,
32 
33 	RTC, WDT, REF_RCMI,
34 };
35 
36 static struct intc_vect vectors[] __initdata = {
37 	/* IRQ0->5 are handled in setup-sh3.c */
38 	INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
39 	INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
40 	INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
41 	INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
42 	INTC_VECT(SCIF0, 0x8e0),
43 	INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
44 	INTC_VECT(SCIF2, 0x960),
45 	INTC_VECT(ADC_ADI, 0x980),
46 	INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
47 	INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
48 	INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
49 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
50 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
51 	INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
52 	INTC_VECT(RTC, 0x4c0),
53 	INTC_VECT(WDT, 0x560),
54 	INTC_VECT(REF_RCMI, 0x580),
55 };
56 
57 static struct intc_prio_reg prio_registers[] __initdata = {
58 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
59 	{ 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
60 	{ 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
61 	{ 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
62 	{ 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
63 	{ 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
64 	{ 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
65 	{ 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
66 
67 };
68 
69 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
70 			 NULL, prio_registers, NULL);
71 
72 static struct plat_sci_port scif0_platform_data = {
73 	.scscr		= SCSCR_CKE1,
74 	.type		= PORT_SCIF,
75 	.ops		= &sh770x_sci_port_ops,
76 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
77 };
78 
79 static struct resource scif0_resources[] = {
80 	DEFINE_RES_MEM(0xa4410000, 0x100),
81 	DEFINE_RES_IRQ(evt2irq(0x900)),
82 };
83 
84 static struct platform_device scif0_device = {
85 	.name		= "sh-sci",
86 	.id		= 0,
87 	.resource	= scif0_resources,
88 	.num_resources	= ARRAY_SIZE(scif0_resources),
89 	.dev		= {
90 		.platform_data	= &scif0_platform_data,
91 	},
92 };
93 
94 static struct plat_sci_port scif1_platform_data = {
95 	.type		= PORT_SCIF,
96 	.ops		= &sh770x_sci_port_ops,
97 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
98 };
99 
100 static struct resource scif1_resources[] = {
101 	DEFINE_RES_MEM(0xa4400000, 0x100),
102 	DEFINE_RES_IRQ(evt2irq(0x880)),
103 };
104 
105 static struct platform_device scif1_device = {
106 	.name		= "sh-sci",
107 	.id		= 1,
108 	.resource	= scif1_resources,
109 	.num_resources	= ARRAY_SIZE(scif1_resources),
110 	.dev		= {
111 		.platform_data	= &scif1_platform_data,
112 	},
113 };
114 
115 static struct resource rtc_resources[] = {
116 	[0] =	{
117 		.start	= 0xfffffec0,
118 		.end	= 0xfffffec0 + 0x1e,
119 		.flags  = IORESOURCE_IO,
120 	},
121 	[1] =	{
122 		.start  = evt2irq(0x480),
123 		.flags	= IORESOURCE_IRQ,
124 	},
125 };
126 
127 static struct sh_rtc_platform_info rtc_info = {
128 	.capabilities	= RTC_CAP_4_DIGIT_YEAR,
129 };
130 
131 static struct platform_device rtc_device = {
132 	.name		= "sh-rtc",
133 	.id		= -1,
134 	.num_resources	= ARRAY_SIZE(rtc_resources),
135 	.resource	= rtc_resources,
136 	.dev		= {
137 		.platform_data = &rtc_info,
138 	},
139 };
140 
141 static struct sh_timer_config tmu0_platform_data = {
142 	.channels_mask = 7,
143 };
144 
145 static struct resource tmu0_resources[] = {
146 	DEFINE_RES_MEM(0xfffffe90, 0x2c),
147 	DEFINE_RES_IRQ(evt2irq(0x400)),
148 	DEFINE_RES_IRQ(evt2irq(0x420)),
149 	DEFINE_RES_IRQ(evt2irq(0x440)),
150 };
151 
152 static struct platform_device tmu0_device = {
153 	.name		= "sh-tmu-sh3",
154 	.id		= 0,
155 	.dev = {
156 		.platform_data	= &tmu0_platform_data,
157 	},
158 	.resource	= tmu0_resources,
159 	.num_resources	= ARRAY_SIZE(tmu0_resources),
160 };
161 
162 static struct platform_device *sh7705_devices[] __initdata = {
163 	&scif0_device,
164 	&scif1_device,
165 	&tmu0_device,
166 	&rtc_device,
167 };
168 
169 static int __init sh7705_devices_setup(void)
170 {
171 	return platform_add_devices(sh7705_devices,
172 				    ARRAY_SIZE(sh7705_devices));
173 }
174 arch_initcall(sh7705_devices_setup);
175 
176 static struct platform_device *sh7705_early_devices[] __initdata = {
177 	&scif0_device,
178 	&scif1_device,
179 	&tmu0_device,
180 };
181 
182 void __init plat_early_device_setup(void)
183 {
184 	early_platform_add_devices(sh7705_early_devices,
185 				   ARRAY_SIZE(sh7705_early_devices));
186 }
187 
188 void __init plat_irq_setup(void)
189 {
190 	register_intc_controller(&intc_desc);
191 	plat_irq_setup_sh3();
192 }
193