xref: /openbmc/linux/arch/sh/kernel/cpu/sh3/setup-sh7705.c (revision 12eb4683)
1 /*
2  * SH7705 Setup
3  *
4  *  Copyright (C) 2006 - 2009  Paul Mundt
5  *  Copyright (C) 2007  Nobuhiro Iwamatsu
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License.  See the file "COPYING" in the main directory of this archive
9  * for more details.
10  */
11 #include <linux/platform_device.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/serial.h>
15 #include <linux/serial_sci.h>
16 #include <linux/sh_timer.h>
17 #include <linux/sh_intc.h>
18 #include <asm/rtc.h>
19 #include <cpu/serial.h>
20 
21 enum {
22 	UNUSED = 0,
23 
24 	/* interrupt sources */
25 	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
26 	PINT07, PINT815,
27 
28 	DMAC, SCIF0, SCIF2, ADC_ADI, USB,
29 
30 	TPU0, TPU1, TPU2, TPU3,
31 	TMU0, TMU1, TMU2,
32 
33 	RTC, WDT, REF_RCMI,
34 };
35 
36 static struct intc_vect vectors[] __initdata = {
37 	/* IRQ0->5 are handled in setup-sh3.c */
38 	INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
39 	INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
40 	INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
41 	INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
42 	INTC_VECT(SCIF0, 0x8e0),
43 	INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
44 	INTC_VECT(SCIF2, 0x960),
45 	INTC_VECT(ADC_ADI, 0x980),
46 	INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
47 	INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
48 	INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
49 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
50 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
51 	INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
52 	INTC_VECT(RTC, 0x4c0),
53 	INTC_VECT(WDT, 0x560),
54 	INTC_VECT(REF_RCMI, 0x580),
55 };
56 
57 static struct intc_prio_reg prio_registers[] __initdata = {
58 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
59 	{ 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
60 	{ 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
61 	{ 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
62 	{ 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
63 	{ 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
64 	{ 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
65 	{ 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
66 
67 };
68 
69 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
70 			 NULL, prio_registers, NULL);
71 
72 static struct plat_sci_port scif0_platform_data = {
73 	.mapbase	= 0xa4410000,
74 	.flags		= UPF_BOOT_AUTOCONF,
75 	.scscr		= SCSCR_TIE | SCSCR_RIE  | SCSCR_TE |
76 			  SCSCR_RE  | SCSCR_CKE1 | SCSCR_CKE0,
77 	.scbrr_algo_id	= SCBRR_ALGO_4,
78 	.type		= PORT_SCIF,
79 	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x900)),
80 	.ops		= &sh770x_sci_port_ops,
81 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
82 };
83 
84 static struct platform_device scif0_device = {
85 	.name		= "sh-sci",
86 	.id		= 0,
87 	.dev		= {
88 		.platform_data	= &scif0_platform_data,
89 	},
90 };
91 
92 static struct plat_sci_port scif1_platform_data = {
93 	.mapbase	= 0xa4400000,
94 	.flags		= UPF_BOOT_AUTOCONF,
95 	.scscr		= SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
96 	.scbrr_algo_id	= SCBRR_ALGO_4,
97 	.type		= PORT_SCIF,
98 	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),
99 	.ops		= &sh770x_sci_port_ops,
100 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
101 };
102 
103 static struct platform_device scif1_device = {
104 	.name		= "sh-sci",
105 	.id		= 1,
106 	.dev		= {
107 		.platform_data	= &scif1_platform_data,
108 	},
109 };
110 
111 static struct resource rtc_resources[] = {
112 	[0] =	{
113 		.start	= 0xfffffec0,
114 		.end	= 0xfffffec0 + 0x1e,
115 		.flags  = IORESOURCE_IO,
116 	},
117 	[1] =	{
118 		.start  = evt2irq(0x480),
119 		.flags	= IORESOURCE_IRQ,
120 	},
121 };
122 
123 static struct sh_rtc_platform_info rtc_info = {
124 	.capabilities	= RTC_CAP_4_DIGIT_YEAR,
125 };
126 
127 static struct platform_device rtc_device = {
128 	.name		= "sh-rtc",
129 	.id		= -1,
130 	.num_resources	= ARRAY_SIZE(rtc_resources),
131 	.resource	= rtc_resources,
132 	.dev		= {
133 		.platform_data = &rtc_info,
134 	},
135 };
136 
137 static struct sh_timer_config tmu0_platform_data = {
138 	.channel_offset = 0x02,
139 	.timer_bit = 0,
140 	.clockevent_rating = 200,
141 };
142 
143 static struct resource tmu0_resources[] = {
144 	[0] = {
145 		.start	= 0xfffffe94,
146 		.end	= 0xfffffe9f,
147 		.flags	= IORESOURCE_MEM,
148 	},
149 	[1] = {
150 		.start	= evt2irq(0x400),
151 		.flags	= IORESOURCE_IRQ,
152 	},
153 };
154 
155 static struct platform_device tmu0_device = {
156 	.name		= "sh_tmu",
157 	.id		= 0,
158 	.dev = {
159 		.platform_data	= &tmu0_platform_data,
160 	},
161 	.resource	= tmu0_resources,
162 	.num_resources	= ARRAY_SIZE(tmu0_resources),
163 };
164 
165 static struct sh_timer_config tmu1_platform_data = {
166 	.channel_offset = 0xe,
167 	.timer_bit = 1,
168 	.clocksource_rating = 200,
169 };
170 
171 static struct resource tmu1_resources[] = {
172 	[0] = {
173 		.start	= 0xfffffea0,
174 		.end	= 0xfffffeab,
175 		.flags	= IORESOURCE_MEM,
176 	},
177 	[1] = {
178 		.start	= evt2irq(0x420),
179 		.flags	= IORESOURCE_IRQ,
180 	},
181 };
182 
183 static struct platform_device tmu1_device = {
184 	.name		= "sh_tmu",
185 	.id		= 1,
186 	.dev = {
187 		.platform_data	= &tmu1_platform_data,
188 	},
189 	.resource	= tmu1_resources,
190 	.num_resources	= ARRAY_SIZE(tmu1_resources),
191 };
192 
193 static struct sh_timer_config tmu2_platform_data = {
194 	.channel_offset = 0x1a,
195 	.timer_bit = 2,
196 };
197 
198 static struct resource tmu2_resources[] = {
199 	[0] = {
200 		.start	= 0xfffffeac,
201 		.end	= 0xfffffebb,
202 		.flags	= IORESOURCE_MEM,
203 	},
204 	[1] = {
205 		.start	= evt2irq(0x440),
206 		.flags	= IORESOURCE_IRQ,
207 	},
208 };
209 
210 static struct platform_device tmu2_device = {
211 	.name		= "sh_tmu",
212 	.id		= 2,
213 	.dev = {
214 		.platform_data	= &tmu2_platform_data,
215 	},
216 	.resource	= tmu2_resources,
217 	.num_resources	= ARRAY_SIZE(tmu2_resources),
218 };
219 
220 static struct platform_device *sh7705_devices[] __initdata = {
221 	&scif0_device,
222 	&scif1_device,
223 	&tmu0_device,
224 	&tmu1_device,
225 	&tmu2_device,
226 	&rtc_device,
227 };
228 
229 static int __init sh7705_devices_setup(void)
230 {
231 	return platform_add_devices(sh7705_devices,
232 				    ARRAY_SIZE(sh7705_devices));
233 }
234 arch_initcall(sh7705_devices_setup);
235 
236 static struct platform_device *sh7705_early_devices[] __initdata = {
237 	&scif0_device,
238 	&scif1_device,
239 	&tmu0_device,
240 	&tmu1_device,
241 	&tmu2_device,
242 };
243 
244 void __init plat_early_device_setup(void)
245 {
246 	early_platform_add_devices(sh7705_early_devices,
247 				   ARRAY_SIZE(sh7705_early_devices));
248 }
249 
250 void __init plat_irq_setup(void)
251 {
252 	register_intc_controller(&intc_desc);
253 	plat_irq_setup_sh3();
254 }
255