xref: /openbmc/linux/arch/sh/kernel/cpu/sh3/setup-sh3.c (revision a2818ee4)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Shared SH3 Setup code
4  *
5  *  Copyright (C) 2008  Magnus Damm
6  */
7 
8 #include <linux/init.h>
9 #include <linux/irq.h>
10 #include <linux/io.h>
11 
12 /* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
13 
14 enum {
15 	UNUSED = 0,
16 
17 	/* interrupt sources */
18 	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
19 };
20 
21 static struct intc_vect vectors_irq0123[] __initdata = {
22 	INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
23 	INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
24 };
25 
26 static struct intc_vect vectors_irq45[] __initdata = {
27 	INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
28 };
29 
30 static struct intc_prio_reg prio_registers[] __initdata = {
31 	{ 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
32 	{ 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
33 };
34 
35 static struct intc_mask_reg ack_registers[] __initdata = {
36 	{ 0xa4000004, 0, 8, /* IRR0 */
37 	  { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
38 };
39 
40 static struct intc_sense_reg sense_registers[] __initdata = {
41 	{ 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
42 };
43 
44 static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
45 			     vectors_irq0123, NULL, NULL,
46 			     prio_registers, sense_registers, ack_registers);
47 
48 static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
49 			     vectors_irq45, NULL, NULL,
50 			     prio_registers, sense_registers, ack_registers);
51 
52 #define INTC_ICR1		0xa4000010UL
53 #define INTC_ICR1_IRQLVL	(1<<14)
54 
55 void __init plat_irq_setup_pins(int mode)
56 {
57 	if (mode == IRQ_MODE_IRQ) {
58 		__raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
59 		register_intc_controller(&intc_desc_irq0123);
60 		return;
61 	}
62 	BUG();
63 }
64 
65 void __init plat_irq_setup_sh3(void)
66 {
67 	register_intc_controller(&intc_desc_irq45);
68 }
69