1 /* 2 * arch/sh/kernel/cpu/sh2a/probe.c 3 * 4 * CPU Subtype Probing for SH-2A. 5 * 6 * Copyright (C) 2004, 2005 Paul Mundt 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 13 #include <linux/init.h> 14 #include <asm/processor.h> 15 #include <asm/cache.h> 16 17 int __init detect_cpu_and_cache_system(void) 18 { 19 /* Just SH7206 for now .. */ 20 current_cpu_data.type = CPU_SH7206; 21 current_cpu_data.flags |= CPU_HAS_OP32; 22 23 current_cpu_data.dcache.ways = 4; 24 current_cpu_data.dcache.way_incr = (1 << 11); 25 current_cpu_data.dcache.sets = 128; 26 current_cpu_data.dcache.entry_shift = 4; 27 current_cpu_data.dcache.linesz = L1_CACHE_BYTES; 28 current_cpu_data.dcache.flags = 0; 29 30 /* 31 * The icache is the same as the dcache as far as this setup is 32 * concerned. The only real difference in hardware is that the icache 33 * lacks the U bit that the dcache has, none of this has any bearing 34 * on the cache info. 35 */ 36 current_cpu_data.icache = current_cpu_data.dcache; 37 38 return 0; 39 } 40 41