1 /* 2 * SH7619 Setup 3 * 4 * Copyright (C) 2006 Yoshinori Sato 5 * Copyright (C) 2009 Paul Mundt 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file "COPYING" in the main directory of this archive 9 * for more details. 10 */ 11 #include <linux/platform_device.h> 12 #include <linux/init.h> 13 #include <linux/serial.h> 14 #include <linux/serial_sci.h> 15 #include <linux/sh_eth.h> 16 #include <linux/sh_timer.h> 17 #include <linux/io.h> 18 19 enum { 20 UNUSED = 0, 21 22 /* interrupt sources */ 23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 24 WDT, EDMAC, CMT0, CMT1, 25 SCIF0, SCIF1, SCIF2, 26 HIF_HIFI, HIF_HIFBI, 27 DMAC0, DMAC1, DMAC2, DMAC3, 28 SIOF, 29 }; 30 31 static struct intc_vect vectors[] __initdata = { 32 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65), 33 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67), 34 INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81), 35 INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83), 36 INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85), 37 INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87), 38 INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89), 39 INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91), 40 INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93), 41 INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95), 42 INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97), 43 INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99), 44 INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101), 45 INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105), 46 INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107), 47 INTC_IRQ(SIOF, 108), 48 }; 49 50 static struct intc_prio_reg prio_registers[] __initdata = { 51 { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } }, 52 { 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } }, 53 { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } }, 54 { 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } }, 55 { 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } }, 56 { 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } }, 57 { 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } }, 58 }; 59 60 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL, 61 NULL, prio_registers, NULL); 62 63 static struct plat_sci_port scif0_platform_data = { 64 .mapbase = 0xf8400000, 65 .flags = UPF_BOOT_AUTOCONF, 66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 67 .scbrr_algo_id = SCBRR_ALGO_2, 68 .type = PORT_SCIF, 69 .irqs = SCIx_IRQ_MUXED(88), 70 }; 71 72 static struct platform_device scif0_device = { 73 .name = "sh-sci", 74 .id = 0, 75 .dev = { 76 .platform_data = &scif0_platform_data, 77 }, 78 }; 79 80 static struct plat_sci_port scif1_platform_data = { 81 .mapbase = 0xf8410000, 82 .flags = UPF_BOOT_AUTOCONF, 83 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 84 .scbrr_algo_id = SCBRR_ALGO_2, 85 .type = PORT_SCIF, 86 .irqs = SCIx_IRQ_MUXED(92), 87 }; 88 89 static struct platform_device scif1_device = { 90 .name = "sh-sci", 91 .id = 1, 92 .dev = { 93 .platform_data = &scif1_platform_data, 94 }, 95 }; 96 97 static struct plat_sci_port scif2_platform_data = { 98 .mapbase = 0xf8420000, 99 .flags = UPF_BOOT_AUTOCONF, 100 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 101 .scbrr_algo_id = SCBRR_ALGO_2, 102 .type = PORT_SCIF, 103 .irqs = SCIx_IRQ_MUXED(96), 104 }; 105 106 static struct platform_device scif2_device = { 107 .name = "sh-sci", 108 .id = 2, 109 .dev = { 110 .platform_data = &scif2_platform_data, 111 }, 112 }; 113 114 static struct sh_eth_plat_data eth_platform_data = { 115 .phy = 1, 116 .edmac_endian = EDMAC_LITTLE_ENDIAN, 117 .phy_interface = PHY_INTERFACE_MODE_MII, 118 }; 119 120 static struct resource eth_resources[] = { 121 [0] = { 122 .start = 0xfb000000, 123 .end = 0xfb0001c7, 124 .flags = IORESOURCE_MEM, 125 }, 126 [1] = { 127 .start = 85, 128 .end = 85, 129 .flags = IORESOURCE_IRQ, 130 }, 131 }; 132 133 static struct platform_device eth_device = { 134 .name = "sh7619-ether", 135 .id = -1, 136 .dev = { 137 .platform_data = ð_platform_data, 138 }, 139 .num_resources = ARRAY_SIZE(eth_resources), 140 .resource = eth_resources, 141 }; 142 143 static struct sh_timer_config cmt0_platform_data = { 144 .channel_offset = 0x02, 145 .timer_bit = 0, 146 .clockevent_rating = 125, 147 .clocksource_rating = 0, /* disabled due to code generation issues */ 148 }; 149 150 static struct resource cmt0_resources[] = { 151 [0] = { 152 .start = 0xf84a0072, 153 .end = 0xf84a0077, 154 .flags = IORESOURCE_MEM, 155 }, 156 [1] = { 157 .start = 86, 158 .flags = IORESOURCE_IRQ, 159 }, 160 }; 161 162 static struct platform_device cmt0_device = { 163 .name = "sh_cmt", 164 .id = 0, 165 .dev = { 166 .platform_data = &cmt0_platform_data, 167 }, 168 .resource = cmt0_resources, 169 .num_resources = ARRAY_SIZE(cmt0_resources), 170 }; 171 172 static struct sh_timer_config cmt1_platform_data = { 173 .channel_offset = 0x08, 174 .timer_bit = 1, 175 .clockevent_rating = 125, 176 .clocksource_rating = 0, /* disabled due to code generation issues */ 177 }; 178 179 static struct resource cmt1_resources[] = { 180 [0] = { 181 .start = 0xf84a0078, 182 .end = 0xf84a007d, 183 .flags = IORESOURCE_MEM, 184 }, 185 [1] = { 186 .start = 87, 187 .flags = IORESOURCE_IRQ, 188 }, 189 }; 190 191 static struct platform_device cmt1_device = { 192 .name = "sh_cmt", 193 .id = 1, 194 .dev = { 195 .platform_data = &cmt1_platform_data, 196 }, 197 .resource = cmt1_resources, 198 .num_resources = ARRAY_SIZE(cmt1_resources), 199 }; 200 201 static struct platform_device *sh7619_devices[] __initdata = { 202 &scif0_device, 203 &scif1_device, 204 &scif2_device, 205 ð_device, 206 &cmt0_device, 207 &cmt1_device, 208 }; 209 210 static int __init sh7619_devices_setup(void) 211 { 212 return platform_add_devices(sh7619_devices, 213 ARRAY_SIZE(sh7619_devices)); 214 } 215 arch_initcall(sh7619_devices_setup); 216 217 void __init plat_irq_setup(void) 218 { 219 register_intc_controller(&intc_desc); 220 } 221 222 static struct platform_device *sh7619_early_devices[] __initdata = { 223 &scif0_device, 224 &scif1_device, 225 &scif2_device, 226 &cmt0_device, 227 &cmt1_device, 228 }; 229 230 #define STBCR3 0xf80a0000 231 232 void __init plat_early_device_setup(void) 233 { 234 /* enable CMT clock */ 235 __raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3); 236 237 early_platform_add_devices(sh7619_early_devices, 238 ARRAY_SIZE(sh7619_early_devices)); 239 } 240