xref: /openbmc/linux/arch/sh/kernel/cpu/sh2/setup-sh7619.c (revision 9ac8d3fb)
1 /*
2  * SH7619 Setup
3  *
4  *  Copyright (C) 2006  Yoshinori Sato
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 #include <linux/platform_device.h>
11 #include <linux/init.h>
12 #include <linux/serial.h>
13 #include <linux/serial_sci.h>
14 
15 enum {
16 	UNUSED = 0,
17 
18 	/* interrupt sources */
19 	IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 	WDT, EDMAC, CMT0, CMT1,
21 	SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
22 	SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
23 	SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
24 	HIF_HIFI, HIF_HIFBI,
25 	DMAC0, DMAC1, DMAC2, DMAC3,
26 	SIOF,
27 
28 	/* interrupt groups */
29 	SCIF0, SCIF1, SCIF2,
30 };
31 
32 static struct intc_vect vectors[] __initdata = {
33 	INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
34 	INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
35 	INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
36 	INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
37 	INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
38 	INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
39 	INTC_IRQ(SCIF0_ERI, 88), INTC_IRQ(SCIF0_RXI, 89),
40 	INTC_IRQ(SCIF0_BRI, 90), INTC_IRQ(SCIF0_TXI, 91),
41 	INTC_IRQ(SCIF1_ERI, 92), INTC_IRQ(SCIF1_RXI, 93),
42 	INTC_IRQ(SCIF1_BRI, 94), INTC_IRQ(SCIF1_TXI, 95),
43 	INTC_IRQ(SCIF2_ERI, 96), INTC_IRQ(SCIF2_RXI, 97),
44 	INTC_IRQ(SCIF2_BRI, 98), INTC_IRQ(SCIF2_TXI, 99),
45 	INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
46 	INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
47 	INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
48 	INTC_IRQ(SIOF, 108),
49 };
50 
51 static struct intc_group groups[] __initdata = {
52 	INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
53 	INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
54 	INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
55 };
56 
57 static struct intc_prio_reg prio_registers[] __initdata = {
58 	{ 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
59 	{ 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
60 	{ 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
61 	{ 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
62 	{ 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
63 	{ 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
64 	{ 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
65 };
66 
67 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
68 			 NULL, prio_registers, NULL);
69 
70 static struct plat_sci_port sci_platform_data[] = {
71 	{
72 		.mapbase	= 0xf8400000,
73 		.flags		= UPF_BOOT_AUTOCONF,
74 		.type		= PORT_SCIF,
75 		.irqs		=  { 88, 89, 91, 90},
76 	}, {
77 		.mapbase	= 0xf8410000,
78 		.flags		= UPF_BOOT_AUTOCONF,
79 		.type		= PORT_SCIF,
80 		.irqs		=  { 92, 93, 95, 94},
81 	}, {
82 		.mapbase	= 0xf8420000,
83 		.flags		= UPF_BOOT_AUTOCONF,
84 		.type		= PORT_SCIF,
85 		.irqs		=  { 96, 97, 99, 98},
86 	}, {
87 		.flags = 0,
88 	}
89 };
90 
91 static struct platform_device sci_device = {
92 	.name		= "sh-sci",
93 	.id		= -1,
94 	.dev		= {
95 		.platform_data	= sci_platform_data,
96 	},
97 };
98 
99 static struct resource eth_resources[] = {
100 	[0] = {
101 		.start = 0xfb000000,
102 		.end =   0xfb0001c8,
103 		.flags = IORESOURCE_MEM,
104 	},
105 	[1] = {
106 		.start = 85,
107 		.end = 85,
108 		.flags = IORESOURCE_IRQ,
109 	},
110 };
111 
112 static struct platform_device eth_device = {
113 	.name = "sh-eth",
114 	.id	= -1,
115 	.dev = {
116 		.platform_data = (void *)1,
117 	},
118 	.num_resources = ARRAY_SIZE(eth_resources),
119 	.resource = eth_resources,
120 };
121 
122 static struct platform_device *sh7619_devices[] __initdata = {
123 	&sci_device,
124 	&eth_device,
125 };
126 
127 static int __init sh7619_devices_setup(void)
128 {
129 	return platform_add_devices(sh7619_devices,
130 				    ARRAY_SIZE(sh7619_devices));
131 }
132 __initcall(sh7619_devices_setup);
133 
134 void __init plat_irq_setup(void)
135 {
136 	register_intc_controller(&intc_desc);
137 }
138