xref: /openbmc/linux/arch/sh/kernel/cpu/irq/ipr.c (revision 78c99ba1)
1 /*
2  * Interrupt handling for IPR-based IRQ.
3  *
4  * Copyright (C) 1999  Niibe Yutaka & Takeshi Yaegashi
5  * Copyright (C) 2000  Kazumoto Kojima
6  * Copyright (C) 2003  Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
7  * Copyright (C) 2006  Paul Mundt
8  *
9  * Supported system:
10  *	On-chip supporting modules (TMU, RTC, etc.).
11  *	On-chip supporting modules for SH7709/SH7709A/SH7729.
12  *	Hitachi SolutionEngine external I/O:
13  *		MS7709SE01, MS7709ASE01, and MS7750SE01
14  *
15  * This file is subject to the terms and conditions of the GNU General Public
16  * License.  See the file "COPYING" in the main directory of this archive
17  * for more details.
18  */
19 #include <linux/init.h>
20 #include <linux/irq.h>
21 #include <linux/module.h>
22 #include <linux/io.h>
23 #include <linux/interrupt.h>
24 #include <linux/topology.h>
25 
26 static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
27 {
28 	struct irq_chip *chip = get_irq_chip(irq);
29 	return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
30 }
31 
32 static void disable_ipr_irq(unsigned int irq)
33 {
34 	struct ipr_data *p = get_irq_chip_data(irq);
35 	unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
36 	/* Set the priority in IPR to 0 */
37 	__raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
38 }
39 
40 static void enable_ipr_irq(unsigned int irq)
41 {
42 	struct ipr_data *p = get_irq_chip_data(irq);
43 	unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
44 	/* Set priority in IPR back to original value */
45 	__raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
46 }
47 
48 /*
49  * The shift value is now the number of bits to shift, not the number of
50  * bits/4. This is to make it easier to read the value directly from the
51  * datasheets. The IPR address is calculated using the ipr_offset table.
52  */
53 void register_ipr_controller(struct ipr_desc *desc)
54 {
55 	int i;
56 
57 	desc->chip.mask = disable_ipr_irq;
58 	desc->chip.unmask = enable_ipr_irq;
59 	desc->chip.mask_ack = disable_ipr_irq;
60 
61 	for (i = 0; i < desc->nr_irqs; i++) {
62 		struct ipr_data *p = desc->ipr_data + i;
63 		struct irq_desc *irq_desc;
64 
65 		BUG_ON(p->ipr_idx >= desc->nr_offsets);
66 		BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
67 
68 		irq_desc = irq_to_desc_alloc_node(p->irq, numa_node_id());
69 		if (unlikely(!irq_desc)) {
70 			printk(KERN_INFO "can not get irq_desc for %d\n",
71 			       p->irq);
72 			continue;
73 		}
74 
75 		disable_irq_nosync(p->irq);
76 		set_irq_chip_and_handler_name(p->irq, &desc->chip,
77 				      handle_level_irq, "level");
78 		set_irq_chip_data(p->irq, p);
79 		disable_ipr_irq(p->irq);
80 	}
81 }
82 EXPORT_SYMBOL(register_ipr_controller);
83