1 /* 2 * include/asm-sh/cpu-sh4/freq.h 3 * 4 * Copyright (C) 2002, 2003 Paul Mundt 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 #ifndef __ASM_CPU_SH4_FREQ_H 11 #define __ASM_CPU_SH4_FREQ_H 12 13 #if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ 14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 15 defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 16 defined(CONFIG_CPU_SUBTYPE_SH7366) 17 #define FRQCR 0xa4150000 18 #define VCLKCR 0xa4150004 19 #define SCLKACR 0xa4150008 20 #define SCLKBCR 0xa415000c 21 #define IrDACLKCR 0xa4150010 22 #define MSTPCR0 0xa4150030 23 #define MSTPCR1 0xa4150034 24 #define MSTPCR2 0xa4150038 25 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 26 defined(CONFIG_CPU_SUBTYPE_SH7780) 27 #define FRQCR 0xffc80000 28 #elif defined(CONFIG_CPU_SUBTYPE_SH7724) 29 #define FRQCRA 0xa4150000 30 #define FRQCRB 0xa4150004 31 #define VCLKCR 0xa4150048 32 33 #define FCLKACR 0xa4150008 34 #define FCLKBCR 0xa415000c 35 #define FRQCR FRQCRA 36 #define SCLKACR FCLKACR 37 #define SCLKBCR FCLKBCR 38 #define FCLKACR 0xa4150008 39 #define FCLKBCR 0xa415000c 40 #define IrDACLKCR 0xa4150018 41 42 #define MSTPCR0 0xa4150030 43 #define MSTPCR1 0xa4150034 44 #define MSTPCR2 0xa4150038 45 46 #elif defined(CONFIG_CPU_SUBTYPE_SH7785) 47 #define FRQCR0 0xffc80000 48 #define FRQCR1 0xffc80004 49 #define FRQMR1 0xffc80014 50 #elif defined(CONFIG_CPU_SUBTYPE_SH7786) 51 #define FRQCR0 0xffc40000 52 #define FRQCR1 0xffc40004 53 #define FRQMR1 0xffc40014 54 #elif defined(CONFIG_CPU_SUBTYPE_SHX3) 55 #define FRQCR 0xffc00014 56 #else 57 #define FRQCR 0xffc00000 58 #define FRQCR_PSTBY 0x0200 59 #define FRQCR_PLLEN 0x0400 60 #define FRQCR_CKOEN 0x0800 61 #endif 62 #define MIN_DIVISOR_NR 0 63 #define MAX_DIVISOR_NR 3 64 65 #endif /* __ASM_CPU_SH4_FREQ_H */ 66 67