18b1935e6SGuennadi Liakhovetski /* 28b1935e6SGuennadi Liakhovetski * SH4 CPU-specific DMA definitions, used by both DMA drivers 38b1935e6SGuennadi Liakhovetski * 48b1935e6SGuennadi Liakhovetski * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> 58b1935e6SGuennadi Liakhovetski * 68b1935e6SGuennadi Liakhovetski * This program is free software; you can redistribute it and/or modify 78b1935e6SGuennadi Liakhovetski * it under the terms of the GNU General Public License version 2 as 88b1935e6SGuennadi Liakhovetski * published by the Free Software Foundation. 98b1935e6SGuennadi Liakhovetski */ 108b1935e6SGuennadi Liakhovetski #ifndef CPU_DMA_REGISTER_H 118b1935e6SGuennadi Liakhovetski #define CPU_DMA_REGISTER_H 128b1935e6SGuennadi Liakhovetski 138b1935e6SGuennadi Liakhovetski /* SH7751/7760/7780 DMA IRQ sources */ 148b1935e6SGuennadi Liakhovetski 158b1935e6SGuennadi Liakhovetski #ifdef CONFIG_CPU_SH4A 168b1935e6SGuennadi Liakhovetski 178b1935e6SGuennadi Liakhovetski #define DMAOR_INIT DMAOR_DME 188b1935e6SGuennadi Liakhovetski 198b1935e6SGuennadi Liakhovetski #if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 208b1935e6SGuennadi Liakhovetski defined(CONFIG_CPU_SUBTYPE_SH7730) 218b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x00000018 228b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 3 238b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0 248b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT 0 25c8e3149bSGuennadi Liakhovetski #elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ 26c8e3149bSGuennadi Liakhovetski defined(CONFIG_CPU_SUBTYPE_SH7724) 278b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x00000018 288b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 3 298b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0x00300000 308b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ 318b1935e6SGuennadi Liakhovetski #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 328b1935e6SGuennadi Liakhovetski defined(CONFIG_CPU_SUBTYPE_SH7764) 338b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x00000018 348b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 3 358b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0 368b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT 0 378b1935e6SGuennadi Liakhovetski #elif defined(CONFIG_CPU_SUBTYPE_SH7723) 388b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x00000018 398b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 3 408b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0 418b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT 0 428b1935e6SGuennadi Liakhovetski #elif defined(CONFIG_CPU_SUBTYPE_SH7780) 438b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x00000018 448b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 3 458b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0 468b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT 0 478b1935e6SGuennadi Liakhovetski #else /* SH7785 */ 488b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x00000018 498b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 3 508b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0 518b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT 0 528b1935e6SGuennadi Liakhovetski #endif 538b1935e6SGuennadi Liakhovetski 548b1935e6SGuennadi Liakhovetski /* Transmit sizes and respective CHCR register values */ 558b1935e6SGuennadi Liakhovetski enum { 568b1935e6SGuennadi Liakhovetski XMIT_SZ_8BIT = 0, 578b1935e6SGuennadi Liakhovetski XMIT_SZ_16BIT = 1, 588b1935e6SGuennadi Liakhovetski XMIT_SZ_32BIT = 2, 598b1935e6SGuennadi Liakhovetski XMIT_SZ_64BIT = 7, 608b1935e6SGuennadi Liakhovetski XMIT_SZ_128BIT = 3, 618b1935e6SGuennadi Liakhovetski XMIT_SZ_256BIT = 4, 628b1935e6SGuennadi Liakhovetski XMIT_SZ_128BIT_BLK = 0xb, 638b1935e6SGuennadi Liakhovetski XMIT_SZ_256BIT_BLK = 0xc, 648b1935e6SGuennadi Liakhovetski }; 658b1935e6SGuennadi Liakhovetski 668b1935e6SGuennadi Liakhovetski /* log2(size / 8) - used to calculate number of transfers */ 678b1935e6SGuennadi Liakhovetski #define TS_SHIFT { \ 688b1935e6SGuennadi Liakhovetski [XMIT_SZ_8BIT] = 0, \ 698b1935e6SGuennadi Liakhovetski [XMIT_SZ_16BIT] = 1, \ 708b1935e6SGuennadi Liakhovetski [XMIT_SZ_32BIT] = 2, \ 718b1935e6SGuennadi Liakhovetski [XMIT_SZ_64BIT] = 3, \ 728b1935e6SGuennadi Liakhovetski [XMIT_SZ_128BIT] = 4, \ 738b1935e6SGuennadi Liakhovetski [XMIT_SZ_256BIT] = 5, \ 748b1935e6SGuennadi Liakhovetski [XMIT_SZ_128BIT_BLK] = 4, \ 758b1935e6SGuennadi Liakhovetski [XMIT_SZ_256BIT_BLK] = 5, \ 768b1935e6SGuennadi Liakhovetski } 778b1935e6SGuennadi Liakhovetski 788b1935e6SGuennadi Liakhovetski #define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \ 798b1935e6SGuennadi Liakhovetski ((((i) >> 2) & 3) << CHCR_TS_HIGH_SHIFT)) 808b1935e6SGuennadi Liakhovetski 818b1935e6SGuennadi Liakhovetski #else /* CONFIG_CPU_SH4A */ 828b1935e6SGuennadi Liakhovetski 838b1935e6SGuennadi Liakhovetski #define DMAOR_INIT (0x8000 | DMAOR_DME) 848b1935e6SGuennadi Liakhovetski 858b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_MASK 0x70 868b1935e6SGuennadi Liakhovetski #define CHCR_TS_LOW_SHIFT 4 878b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_MASK 0 888b1935e6SGuennadi Liakhovetski #define CHCR_TS_HIGH_SHIFT 0 898b1935e6SGuennadi Liakhovetski 908b1935e6SGuennadi Liakhovetski /* Transmit sizes and respective CHCR register values */ 918b1935e6SGuennadi Liakhovetski enum { 928b1935e6SGuennadi Liakhovetski XMIT_SZ_8BIT = 1, 938b1935e6SGuennadi Liakhovetski XMIT_SZ_16BIT = 2, 948b1935e6SGuennadi Liakhovetski XMIT_SZ_32BIT = 3, 958b1935e6SGuennadi Liakhovetski XMIT_SZ_64BIT = 0, 968b1935e6SGuennadi Liakhovetski XMIT_SZ_256BIT = 4, 978b1935e6SGuennadi Liakhovetski }; 988b1935e6SGuennadi Liakhovetski 998b1935e6SGuennadi Liakhovetski /* log2(size / 8) - used to calculate number of transfers */ 1008b1935e6SGuennadi Liakhovetski #define TS_SHIFT { \ 1018b1935e6SGuennadi Liakhovetski [XMIT_SZ_8BIT] = 0, \ 1028b1935e6SGuennadi Liakhovetski [XMIT_SZ_16BIT] = 1, \ 1038b1935e6SGuennadi Liakhovetski [XMIT_SZ_32BIT] = 2, \ 1048b1935e6SGuennadi Liakhovetski [XMIT_SZ_64BIT] = 3, \ 1058b1935e6SGuennadi Liakhovetski [XMIT_SZ_256BIT] = 5, \ 1068b1935e6SGuennadi Liakhovetski } 1078b1935e6SGuennadi Liakhovetski 1088b1935e6SGuennadi Liakhovetski #define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT) 1098b1935e6SGuennadi Liakhovetski 1108b1935e6SGuennadi Liakhovetski #endif /* CONFIG_CPU_SH4A */ 1118b1935e6SGuennadi Liakhovetski 1128b1935e6SGuennadi Liakhovetski #endif 113