1f15cbe6fSPaul Mundt /* 2f15cbe6fSPaul Mundt * include/asm-sh/cpu-sh3/gpio.h 3f15cbe6fSPaul Mundt * 4f15cbe6fSPaul Mundt * Copyright (C) 2007 Markus Brunner, Mark Jonas 5f15cbe6fSPaul Mundt * 6f15cbe6fSPaul Mundt * Addresses for the Pin Function Controller 7f15cbe6fSPaul Mundt * 8f15cbe6fSPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 9f15cbe6fSPaul Mundt * License. See the file "COPYING" in the main directory of this archive 10f15cbe6fSPaul Mundt * for more details. 11f15cbe6fSPaul Mundt */ 12f15cbe6fSPaul Mundt #ifndef _CPU_SH3_GPIO_H 13f15cbe6fSPaul Mundt #define _CPU_SH3_GPIO_H 14f15cbe6fSPaul Mundt 15f15cbe6fSPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 16f15cbe6fSPaul Mundt defined(CONFIG_CPU_SUBTYPE_SH7721) 17f15cbe6fSPaul Mundt 18f15cbe6fSPaul Mundt /* Control registers */ 19f15cbe6fSPaul Mundt #define PORT_PACR 0xA4050100UL 20f15cbe6fSPaul Mundt #define PORT_PBCR 0xA4050102UL 21f15cbe6fSPaul Mundt #define PORT_PCCR 0xA4050104UL 22f15cbe6fSPaul Mundt #define PORT_PDCR 0xA4050106UL 23f15cbe6fSPaul Mundt #define PORT_PECR 0xA4050108UL 24f15cbe6fSPaul Mundt #define PORT_PFCR 0xA405010AUL 25f15cbe6fSPaul Mundt #define PORT_PGCR 0xA405010CUL 26f15cbe6fSPaul Mundt #define PORT_PHCR 0xA405010EUL 27f15cbe6fSPaul Mundt #define PORT_PJCR 0xA4050110UL 28f15cbe6fSPaul Mundt #define PORT_PKCR 0xA4050112UL 29f15cbe6fSPaul Mundt #define PORT_PLCR 0xA4050114UL 30f15cbe6fSPaul Mundt #define PORT_PMCR 0xA4050116UL 31f15cbe6fSPaul Mundt #define PORT_PPCR 0xA4050118UL 32f15cbe6fSPaul Mundt #define PORT_PRCR 0xA405011AUL 33f15cbe6fSPaul Mundt #define PORT_PSCR 0xA405011CUL 34f15cbe6fSPaul Mundt #define PORT_PTCR 0xA405011EUL 35f15cbe6fSPaul Mundt #define PORT_PUCR 0xA4050120UL 36f15cbe6fSPaul Mundt #define PORT_PVCR 0xA4050122UL 37f15cbe6fSPaul Mundt 38f15cbe6fSPaul Mundt /* Data registers */ 39f15cbe6fSPaul Mundt #define PORT_PADR 0xA4050140UL 40f15cbe6fSPaul Mundt /* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */ 41f15cbe6fSPaul Mundt #define PORT_PBDR 0xA4050142UL 42f15cbe6fSPaul Mundt #define PORT_PCDR 0xA4050144UL 43f15cbe6fSPaul Mundt #define PORT_PDDR 0xA4050146UL 44f15cbe6fSPaul Mundt #define PORT_PEDR 0xA4050148UL 45f15cbe6fSPaul Mundt #define PORT_PFDR 0xA405014AUL 46f15cbe6fSPaul Mundt #define PORT_PGDR 0xA405014CUL 47f15cbe6fSPaul Mundt #define PORT_PHDR 0xA405014EUL 48f15cbe6fSPaul Mundt #define PORT_PJDR 0xA4050150UL 49f15cbe6fSPaul Mundt #define PORT_PKDR 0xA4050152UL 50f15cbe6fSPaul Mundt #define PORT_PLDR 0xA4050154UL 51f15cbe6fSPaul Mundt #define PORT_PMDR 0xA4050156UL 52f15cbe6fSPaul Mundt #define PORT_PPDR 0xA4050158UL 53f15cbe6fSPaul Mundt #define PORT_PRDR 0xA405015AUL 54f15cbe6fSPaul Mundt #define PORT_PSDR 0xA405015CUL 55f15cbe6fSPaul Mundt #define PORT_PTDR 0xA405015EUL 56f15cbe6fSPaul Mundt #define PORT_PUDR 0xA4050160UL 57f15cbe6fSPaul Mundt #define PORT_PVDR 0xA4050162UL 58f15cbe6fSPaul Mundt 59f15cbe6fSPaul Mundt /* Pin Select Registers */ 60f15cbe6fSPaul Mundt #define PORT_PSELA 0xA4050124UL 61f15cbe6fSPaul Mundt #define PORT_PSELB 0xA4050126UL 62f15cbe6fSPaul Mundt #define PORT_PSELC 0xA4050128UL 63f15cbe6fSPaul Mundt #define PORT_PSELD 0xA405012AUL 64f15cbe6fSPaul Mundt 65f15cbe6fSPaul Mundt #endif 66f15cbe6fSPaul Mundt 67f15cbe6fSPaul Mundt #endif 68