1f15cbe6fSPaul Mundt #ifndef __ASM_CPU_SH3_DMA_H 2f15cbe6fSPaul Mundt #define __ASM_CPU_SH3_DMA_H 3f15cbe6fSPaul Mundt 49f380456SPaul Mundt #include <linux/sh_intc.h> 59f380456SPaul Mundt 6f15cbe6fSPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 771b973a4SNobuhiro Iwamatsu defined(CONFIG_CPU_SUBTYPE_SH7721) || \ 871b973a4SNobuhiro Iwamatsu defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 971b973a4SNobuhiro Iwamatsu defined(CONFIG_CPU_SUBTYPE_SH7712) 1071b973a4SNobuhiro Iwamatsu #define SH_DMAC_BASE0 0xa4010020 1171b973a4SNobuhiro Iwamatsu #else /* SH7705/06/07/09 */ 1271b973a4SNobuhiro Iwamatsu #define SH_DMAC_BASE0 0xa4000020 13f15cbe6fSPaul Mundt #endif 14f15cbe6fSPaul Mundt 159f380456SPaul Mundt #define DMTE0_IRQ evt2irq(0x800) 169f380456SPaul Mundt #define DMTE4_IRQ evt2irq(0xb80) 17f15cbe6fSPaul Mundt 18f15cbe6fSPaul Mundt /* Definitions for the SuperH DMAC */ 19f15cbe6fSPaul Mundt #define TM_BURST 0x00000020 20f15cbe6fSPaul Mundt #define TS_8 0x00000000 21f15cbe6fSPaul Mundt #define TS_16 0x00000008 22f15cbe6fSPaul Mundt #define TS_32 0x00000010 23f15cbe6fSPaul Mundt #define TS_128 0x00000018 24f15cbe6fSPaul Mundt 25f15cbe6fSPaul Mundt #endif /* __ASM_CPU_SH3_DMA_H */ 26