xref: /openbmc/linux/arch/sh/include/cpu-sh2/cpu/cache.h (revision cfbb9be8)
1 /*
2  * include/asm-sh/cpu-sh2/cache.h
3  *
4  * Copyright (C) 2003 Paul Mundt
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 #ifndef __ASM_CPU_SH2_CACHE_H
11 #define __ASM_CPU_SH2_CACHE_H
12 
13 #define L1_CACHE_SHIFT	4
14 
15 #define SH_CACHE_VALID		1
16 #define SH_CACHE_UPDATED	2
17 #define SH_CACHE_COMBINED	4
18 #define SH_CACHE_ASSOC		8
19 
20 #if defined(CONFIG_CPU_SUBTYPE_SH7619)
21 #define SH_CCR		0xffffffec
22 
23 #define CCR_CACHE_CE	0x01	/* Cache enable */
24 #define CCR_CACHE_WT	0x02    /* CCR[bit1=1,bit2=1] */
25 				/* 0x00000000-0x7fffffff: Write-through  */
26 				/* 0x80000000-0x9fffffff: Write-back     */
27                                 /* 0xc0000000-0xdfffffff: Write-through  */
28 #define CCR_CACHE_CB	0x04    /* CCR[bit1=0,bit2=0] */
29 				/* 0x00000000-0x7fffffff: Write-back     */
30 				/* 0x80000000-0x9fffffff: Write-through  */
31                                 /* 0xc0000000-0xdfffffff: Write-back     */
32 #define CCR_CACHE_CF	0x08	/* Cache invalidate */
33 
34 #define CACHE_OC_ADDRESS_ARRAY	0xf0000000
35 #define CACHE_OC_DATA_ARRAY	0xf1000000
36 
37 #define CCR_CACHE_ENABLE	CCR_CACHE_CE
38 #define CCR_CACHE_INVALIDATE	CCR_CACHE_CF
39 #define CACHE_PHYSADDR_MASK	0x1ffffc00
40 
41 #endif
42 
43 #endif /* __ASM_CPU_SH2_CACHE_H */
44