1 /* 2 * include/asm-sh/processor.h 3 * 4 * Copyright (C) 1999, 2000 Niibe Yutaka 5 * Copyright (C) 2002, 2003 Paul Mundt 6 */ 7 8 #ifndef __ASM_SH_PROCESSOR_32_H 9 #define __ASM_SH_PROCESSOR_32_H 10 #ifdef __KERNEL__ 11 12 #include <linux/compiler.h> 13 #include <linux/linkage.h> 14 #include <asm/page.h> 15 #include <asm/types.h> 16 #include <asm/ptrace.h> 17 18 /* 19 * Default implementation of macro that returns current 20 * instruction pointer ("program counter"). 21 */ 22 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) 23 24 /* Core Processor Version Register */ 25 #define CCN_PVR 0xff000030 26 #define CCN_CVR 0xff000040 27 #define CCN_PRR 0xff000044 28 29 asmlinkage void __init sh_cpu_init(void); 30 31 /* 32 * User space process size: 2GB. 33 * 34 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff 35 */ 36 #define TASK_SIZE 0x7c000000UL 37 38 #define STACK_TOP TASK_SIZE 39 #define STACK_TOP_MAX STACK_TOP 40 41 /* This decides where the kernel will search for a free chunk of vm 42 * space during mmap's. 43 */ 44 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) 45 46 /* 47 * Bit of SR register 48 * 49 * FD-bit: 50 * When it's set, it means the processor doesn't have right to use FPU, 51 * and it results exception when the floating operation is executed. 52 * 53 * IMASK-bit: 54 * Interrupt level mask 55 */ 56 #define SR_DSP 0x00001000 57 #define SR_IMASK 0x000000f0 58 #define SR_FD 0x00008000 59 60 /* 61 * DSP structure and data 62 */ 63 struct sh_dsp_struct { 64 unsigned long dsp_regs[14]; 65 long status; 66 }; 67 68 /* 69 * FPU structure and data 70 */ 71 72 struct sh_fpu_hard_struct { 73 unsigned long fp_regs[16]; 74 unsigned long xfp_regs[16]; 75 unsigned long fpscr; 76 unsigned long fpul; 77 78 long status; /* software status information */ 79 }; 80 81 /* Dummy fpu emulator */ 82 struct sh_fpu_soft_struct { 83 unsigned long fp_regs[16]; 84 unsigned long xfp_regs[16]; 85 unsigned long fpscr; 86 unsigned long fpul; 87 88 unsigned char lookahead; 89 unsigned long entry_pc; 90 }; 91 92 union sh_fpu_union { 93 struct sh_fpu_hard_struct hard; 94 struct sh_fpu_soft_struct soft; 95 }; 96 97 struct thread_struct { 98 /* Saved registers when thread is descheduled */ 99 unsigned long sp; 100 unsigned long pc; 101 102 /* Hardware debugging registers */ 103 unsigned long ubc_pc; 104 105 /* floating point info */ 106 union sh_fpu_union fpu; 107 108 #ifdef CONFIG_SH_DSP 109 /* Dsp status information */ 110 struct sh_dsp_struct dsp_status; 111 #endif 112 }; 113 114 /* Count of active tasks with UBC settings */ 115 extern int ubc_usercnt; 116 117 #define INIT_THREAD { \ 118 .sp = sizeof(init_stack) + (long) &init_stack, \ 119 } 120 121 /* 122 * Do necessary setup to start up a newly executed thread. 123 */ 124 #define start_thread(_regs, new_pc, new_sp) \ 125 set_fs(USER_DS); \ 126 _regs->pr = 0; \ 127 _regs->sr = SR_FD; /* User mode. */ \ 128 _regs->pc = new_pc; \ 129 _regs->regs[15] = new_sp 130 131 /* Forward declaration, a strange C thing */ 132 struct task_struct; 133 struct mm_struct; 134 135 /* Free all resources held by a thread. */ 136 extern void release_thread(struct task_struct *); 137 138 /* Prepare to copy thread state - unlazy all lazy status */ 139 #define prepare_to_copy(tsk) do { } while (0) 140 141 /* 142 * create a kernel thread without removing it from tasklists 143 */ 144 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 145 146 /* Copy and release all segment info associated with a VM */ 147 #define copy_segments(p, mm) do { } while(0) 148 #define release_segments(mm) do { } while(0) 149 150 /* 151 * FPU lazy state save handling. 152 */ 153 154 static __inline__ void disable_fpu(void) 155 { 156 unsigned long __dummy; 157 158 /* Set FD flag in SR */ 159 __asm__ __volatile__("stc sr, %0\n\t" 160 "or %1, %0\n\t" 161 "ldc %0, sr" 162 : "=&r" (__dummy) 163 : "r" (SR_FD)); 164 } 165 166 static __inline__ void enable_fpu(void) 167 { 168 unsigned long __dummy; 169 170 /* Clear out FD flag in SR */ 171 __asm__ __volatile__("stc sr, %0\n\t" 172 "and %1, %0\n\t" 173 "ldc %0, sr" 174 : "=&r" (__dummy) 175 : "r" (~SR_FD)); 176 } 177 178 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ 179 #define FPSCR_INIT 0x00080000 180 181 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ 182 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ 183 184 /* 185 * Return saved PC of a blocked thread. 186 */ 187 #define thread_saved_pc(tsk) (tsk->thread.pc) 188 189 void show_trace(struct task_struct *tsk, unsigned long *sp, 190 struct pt_regs *regs); 191 192 #ifdef CONFIG_DUMP_CODE 193 void show_code(struct pt_regs *regs); 194 #else 195 static inline void show_code(struct pt_regs *regs) 196 { 197 } 198 #endif 199 200 extern unsigned long get_wchan(struct task_struct *p); 201 202 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) 203 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) 204 205 #define user_stack_pointer(_regs) ((_regs)->regs[15]) 206 207 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) 208 #define PREFETCH_STRIDE L1_CACHE_BYTES 209 #define ARCH_HAS_PREFETCH 210 #define ARCH_HAS_PREFETCHW 211 static inline void prefetch(void *x) 212 { 213 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); 214 } 215 216 #define prefetchw(x) prefetch(x) 217 #endif 218 219 #endif /* __KERNEL__ */ 220 #endif /* __ASM_SH_PROCESSOR_32_H */ 221