1 /* 2 * include/asm-sh/processor.h 3 * 4 * Copyright (C) 1999, 2000 Niibe Yutaka 5 * Copyright (C) 2002, 2003 Paul Mundt 6 */ 7 8 #ifndef __ASM_SH_PROCESSOR_32_H 9 #define __ASM_SH_PROCESSOR_32_H 10 #ifdef __KERNEL__ 11 12 #include <linux/compiler.h> 13 #include <linux/linkage.h> 14 #include <asm/page.h> 15 #include <asm/types.h> 16 #include <asm/ptrace.h> 17 18 /* 19 * Default implementation of macro that returns current 20 * instruction pointer ("program counter"). 21 */ 22 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) 23 24 /* Core Processor Version Register */ 25 #define CCN_PVR 0xff000030 26 #define CCN_CVR 0xff000040 27 #define CCN_PRR 0xff000044 28 29 asmlinkage void __init sh_cpu_init(void); 30 31 /* 32 * User space process size: 2GB. 33 * 34 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff 35 */ 36 #define TASK_SIZE 0x7c000000UL 37 38 #define STACK_TOP TASK_SIZE 39 #define STACK_TOP_MAX STACK_TOP 40 41 /* This decides where the kernel will search for a free chunk of vm 42 * space during mmap's. 43 */ 44 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) 45 46 /* 47 * Bit of SR register 48 * 49 * FD-bit: 50 * When it's set, it means the processor doesn't have right to use FPU, 51 * and it results exception when the floating operation is executed. 52 * 53 * IMASK-bit: 54 * Interrupt level mask 55 */ 56 #define SR_DSP 0x00001000 57 #define SR_IMASK 0x000000f0 58 #define SR_FD 0x00008000 59 #define SR_MD 0x40000000 60 61 /* 62 * DSP structure and data 63 */ 64 struct sh_dsp_struct { 65 unsigned long dsp_regs[14]; 66 long status; 67 }; 68 69 /* 70 * FPU structure and data 71 */ 72 73 struct sh_fpu_hard_struct { 74 unsigned long fp_regs[16]; 75 unsigned long xfp_regs[16]; 76 unsigned long fpscr; 77 unsigned long fpul; 78 79 long status; /* software status information */ 80 }; 81 82 /* Dummy fpu emulator */ 83 struct sh_fpu_soft_struct { 84 unsigned long fp_regs[16]; 85 unsigned long xfp_regs[16]; 86 unsigned long fpscr; 87 unsigned long fpul; 88 89 unsigned char lookahead; 90 unsigned long entry_pc; 91 }; 92 93 union sh_fpu_union { 94 struct sh_fpu_hard_struct hard; 95 struct sh_fpu_soft_struct soft; 96 }; 97 98 struct thread_struct { 99 /* Saved registers when thread is descheduled */ 100 unsigned long sp; 101 unsigned long pc; 102 103 /* Hardware debugging registers */ 104 unsigned long ubc_pc; 105 106 /* floating point info */ 107 union sh_fpu_union fpu; 108 109 #ifdef CONFIG_SH_DSP 110 /* Dsp status information */ 111 struct sh_dsp_struct dsp_status; 112 #endif 113 }; 114 115 /* Count of active tasks with UBC settings */ 116 extern int ubc_usercnt; 117 118 #define INIT_THREAD { \ 119 .sp = sizeof(init_stack) + (long) &init_stack, \ 120 } 121 122 /* 123 * Do necessary setup to start up a newly executed thread. 124 */ 125 #define start_thread(_regs, new_pc, new_sp) \ 126 set_fs(USER_DS); \ 127 _regs->pr = 0; \ 128 _regs->sr = SR_FD; /* User mode. */ \ 129 _regs->pc = new_pc; \ 130 _regs->regs[15] = new_sp 131 132 /* Forward declaration, a strange C thing */ 133 struct task_struct; 134 struct mm_struct; 135 136 /* Free all resources held by a thread. */ 137 extern void release_thread(struct task_struct *); 138 139 /* Prepare to copy thread state - unlazy all lazy status */ 140 void prepare_to_copy(struct task_struct *tsk); 141 142 /* 143 * create a kernel thread without removing it from tasklists 144 */ 145 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 146 147 /* Copy and release all segment info associated with a VM */ 148 #define copy_segments(p, mm) do { } while(0) 149 #define release_segments(mm) do { } while(0) 150 151 /* 152 * FPU lazy state save handling. 153 */ 154 155 static __inline__ void disable_fpu(void) 156 { 157 unsigned long __dummy; 158 159 /* Set FD flag in SR */ 160 __asm__ __volatile__("stc sr, %0\n\t" 161 "or %1, %0\n\t" 162 "ldc %0, sr" 163 : "=&r" (__dummy) 164 : "r" (SR_FD)); 165 } 166 167 static __inline__ void enable_fpu(void) 168 { 169 unsigned long __dummy; 170 171 /* Clear out FD flag in SR */ 172 __asm__ __volatile__("stc sr, %0\n\t" 173 "and %1, %0\n\t" 174 "ldc %0, sr" 175 : "=&r" (__dummy) 176 : "r" (~SR_FD)); 177 } 178 179 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ 180 #define FPSCR_INIT 0x00080000 181 182 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ 183 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ 184 185 /* 186 * Return saved PC of a blocked thread. 187 */ 188 #define thread_saved_pc(tsk) (tsk->thread.pc) 189 190 void show_trace(struct task_struct *tsk, unsigned long *sp, 191 struct pt_regs *regs); 192 193 #ifdef CONFIG_DUMP_CODE 194 void show_code(struct pt_regs *regs); 195 #else 196 static inline void show_code(struct pt_regs *regs) 197 { 198 } 199 #endif 200 201 extern unsigned long get_wchan(struct task_struct *p); 202 203 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) 204 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) 205 206 #define user_stack_pointer(_regs) ((_regs)->regs[15]) 207 208 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) 209 #define PREFETCH_STRIDE L1_CACHE_BYTES 210 #define ARCH_HAS_PREFETCH 211 #define ARCH_HAS_PREFETCHW 212 static inline void prefetch(void *x) 213 { 214 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); 215 } 216 217 #define prefetchw(x) prefetch(x) 218 #endif 219 220 #endif /* __KERNEL__ */ 221 #endif /* __ASM_SH_PROCESSOR_32_H */ 222