1 /* 2 * include/asm-sh/processor.h 3 * 4 * Copyright (C) 1999, 2000 Niibe Yutaka 5 * Copyright (C) 2002, 2003 Paul Mundt 6 */ 7 8 #ifndef __ASM_SH_PROCESSOR_32_H 9 #define __ASM_SH_PROCESSOR_32_H 10 #ifdef __KERNEL__ 11 12 #include <linux/compiler.h> 13 #include <linux/linkage.h> 14 #include <asm/page.h> 15 #include <asm/types.h> 16 #include <asm/ptrace.h> 17 #include <asm/hw_breakpoint.h> 18 19 /* 20 * Default implementation of macro that returns current 21 * instruction pointer ("program counter"). 22 */ 23 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) 24 25 /* Core Processor Version Register */ 26 #define CCN_PVR 0xff000030 27 #define CCN_CVR 0xff000040 28 #define CCN_PRR 0xff000044 29 30 asmlinkage void __init sh_cpu_init(void); 31 32 /* 33 * User space process size: 2GB. 34 * 35 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff 36 */ 37 #define TASK_SIZE 0x7c000000UL 38 39 #define STACK_TOP TASK_SIZE 40 #define STACK_TOP_MAX STACK_TOP 41 42 /* This decides where the kernel will search for a free chunk of vm 43 * space during mmap's. 44 */ 45 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) 46 47 /* 48 * Bit of SR register 49 * 50 * FD-bit: 51 * When it's set, it means the processor doesn't have right to use FPU, 52 * and it results exception when the floating operation is executed. 53 * 54 * IMASK-bit: 55 * Interrupt level mask 56 */ 57 #define SR_DSP 0x00001000 58 #define SR_IMASK 0x000000f0 59 #define SR_FD 0x00008000 60 #define SR_MD 0x40000000 61 62 /* 63 * DSP structure and data 64 */ 65 struct sh_dsp_struct { 66 unsigned long dsp_regs[14]; 67 long status; 68 }; 69 70 /* 71 * FPU structure and data 72 */ 73 74 struct sh_fpu_hard_struct { 75 unsigned long fp_regs[16]; 76 unsigned long xfp_regs[16]; 77 unsigned long fpscr; 78 unsigned long fpul; 79 80 long status; /* software status information */ 81 }; 82 83 /* Dummy fpu emulator */ 84 struct sh_fpu_soft_struct { 85 unsigned long fp_regs[16]; 86 unsigned long xfp_regs[16]; 87 unsigned long fpscr; 88 unsigned long fpul; 89 90 unsigned char lookahead; 91 unsigned long entry_pc; 92 }; 93 94 union thread_xstate { 95 struct sh_fpu_hard_struct hardfpu; 96 struct sh_fpu_soft_struct softfpu; 97 }; 98 99 extern unsigned int xstate_size; 100 extern void free_thread_xstate(struct task_struct *); 101 extern struct kmem_cache *task_xstate_cachep; 102 103 struct thread_struct { 104 /* Saved registers when thread is descheduled */ 105 unsigned long sp; 106 unsigned long pc; 107 108 /* Save middle states of ptrace breakpoints */ 109 struct perf_event *ptrace_bps[HBP_NUM]; 110 111 #ifdef CONFIG_SH_DSP 112 /* Dsp status information */ 113 struct sh_dsp_struct dsp_status; 114 #endif 115 116 /* Extended processor state */ 117 union thread_xstate *xstate; 118 }; 119 120 #define INIT_THREAD { \ 121 .sp = sizeof(init_stack) + (long) &init_stack, \ 122 } 123 124 /* Forward declaration, a strange C thing */ 125 struct task_struct; 126 127 extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp); 128 129 /* Free all resources held by a thread. */ 130 extern void release_thread(struct task_struct *); 131 132 /* Prepare to copy thread state - unlazy all lazy status */ 133 void prepare_to_copy(struct task_struct *tsk); 134 135 /* 136 * create a kernel thread without removing it from tasklists 137 */ 138 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 139 140 /* Copy and release all segment info associated with a VM */ 141 #define copy_segments(p, mm) do { } while(0) 142 #define release_segments(mm) do { } while(0) 143 144 /* 145 * FPU lazy state save handling. 146 */ 147 148 static __inline__ void disable_fpu(void) 149 { 150 unsigned long __dummy; 151 152 /* Set FD flag in SR */ 153 __asm__ __volatile__("stc sr, %0\n\t" 154 "or %1, %0\n\t" 155 "ldc %0, sr" 156 : "=&r" (__dummy) 157 : "r" (SR_FD)); 158 } 159 160 static __inline__ void enable_fpu(void) 161 { 162 unsigned long __dummy; 163 164 /* Clear out FD flag in SR */ 165 __asm__ __volatile__("stc sr, %0\n\t" 166 "and %1, %0\n\t" 167 "ldc %0, sr" 168 : "=&r" (__dummy) 169 : "r" (~SR_FD)); 170 } 171 172 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ 173 #define FPSCR_INIT 0x00080000 174 175 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ 176 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ 177 178 /* 179 * Return saved PC of a blocked thread. 180 */ 181 #define thread_saved_pc(tsk) (tsk->thread.pc) 182 183 void show_trace(struct task_struct *tsk, unsigned long *sp, 184 struct pt_regs *regs); 185 186 #ifdef CONFIG_DUMP_CODE 187 void show_code(struct pt_regs *regs); 188 #else 189 static inline void show_code(struct pt_regs *regs) 190 { 191 } 192 #endif 193 194 extern unsigned long get_wchan(struct task_struct *p); 195 196 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) 197 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) 198 199 #define user_stack_pointer(_regs) ((_regs)->regs[15]) 200 201 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) 202 #define PREFETCH_STRIDE L1_CACHE_BYTES 203 #define ARCH_HAS_PREFETCH 204 #define ARCH_HAS_PREFETCHW 205 static inline void prefetch(void *x) 206 { 207 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); 208 } 209 210 #define prefetchw(x) prefetch(x) 211 #endif 212 213 #endif /* __KERNEL__ */ 214 #endif /* __ASM_SH_PROCESSOR_32_H */ 215