xref: /openbmc/linux/arch/sh/include/asm/pgtable_32.h (revision a09d2831)
1 #ifndef __ASM_SH_PGTABLE_32_H
2 #define __ASM_SH_PGTABLE_32_H
3 
4 /*
5  * Linux PTEL encoding.
6  *
7  * Hardware and software bit definitions for the PTEL value (see below for
8  * notes on SH-X2 MMUs and 64-bit PTEs):
9  *
10  * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
11  *
12  * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
13  *   hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
14  *   which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
15  *
16  *   In order to keep this relatively clean, do not use these for defining
17  *   SH-3 specific flags until all of the other unused bits have been
18  *   exhausted.
19  *
20  * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
21  *
22  * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
23  *   Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL.
24  *
25  * - On 29 bit platforms, bits 31 to 29 are used for the space attributes
26  *   and timing control which (together with bit 0) are moved into the
27  *   old-style PTEA on the parts that support it.
28  *
29  * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
30  *
31  * SH-X2 MMUs and extended PTEs
32  *
33  * SH-X2 supports an extended mode TLB with split data arrays due to the
34  * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
35  * SZ bit placeholders still exist in data array 1, but are implemented as
36  * reserved bits, with the real logic existing in data array 2.
37  *
38  * The downside to this is that we can no longer fit everything in to a 32-bit
39  * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
40  * side, this gives us quite a few spare bits to play with for future usage.
41  */
42 /* Legacy and compat mode bits */
43 #define	_PAGE_WT	0x001		/* WT-bit on SH-4, 0 on SH-3 */
44 #define _PAGE_HW_SHARED	0x002		/* SH-bit  : shared among processes */
45 #define _PAGE_DIRTY	0x004		/* D-bit   : page changed */
46 #define _PAGE_CACHABLE	0x008		/* C-bit   : cachable */
47 #define _PAGE_SZ0	0x010		/* SZ0-bit : Size of page */
48 #define _PAGE_RW	0x020		/* PR0-bit : write access allowed */
49 #define _PAGE_USER	0x040		/* PR1-bit : user space access allowed*/
50 #define _PAGE_SZ1	0x080		/* SZ1-bit : Size of page (on SH-4) */
51 #define _PAGE_PRESENT	0x100		/* V-bit   : page is valid */
52 #define _PAGE_PROTNONE	0x200		/* software: if not present  */
53 #define _PAGE_ACCESSED	0x400		/* software: page referenced */
54 #define _PAGE_FILE	_PAGE_WT	/* software: pagecache or swap? */
55 #define _PAGE_SPECIAL	0x800		/* software: special page */
56 
57 #define _PAGE_SZ_MASK	(_PAGE_SZ0 | _PAGE_SZ1)
58 #define _PAGE_PR_MASK	(_PAGE_RW | _PAGE_USER)
59 
60 /* Extended mode bits */
61 #define _PAGE_EXT_ESZ0		0x0010	/* ESZ0-bit: Size of page */
62 #define _PAGE_EXT_ESZ1		0x0020	/* ESZ1-bit: Size of page */
63 #define _PAGE_EXT_ESZ2		0x0040	/* ESZ2-bit: Size of page */
64 #define _PAGE_EXT_ESZ3		0x0080	/* ESZ3-bit: Size of page */
65 
66 #define _PAGE_EXT_USER_EXEC	0x0100	/* EPR0-bit: User space executable */
67 #define _PAGE_EXT_USER_WRITE	0x0200	/* EPR1-bit: User space writable */
68 #define _PAGE_EXT_USER_READ	0x0400	/* EPR2-bit: User space readable */
69 
70 #define _PAGE_EXT_KERN_EXEC	0x0800	/* EPR3-bit: Kernel space executable */
71 #define _PAGE_EXT_KERN_WRITE	0x1000	/* EPR4-bit: Kernel space writable */
72 #define _PAGE_EXT_KERN_READ	0x2000	/* EPR5-bit: Kernel space readable */
73 
74 /* Wrapper for extended mode pgprot twiddling */
75 #define _PAGE_EXT(x)		((unsigned long long)(x) << 32)
76 
77 /* software: moves to PTEA.TC (Timing Control) */
78 #define _PAGE_PCC_AREA5	0x00000000	/* use BSC registers for area5 */
79 #define _PAGE_PCC_AREA6	0x80000000	/* use BSC registers for area6 */
80 
81 /* software: moves to PTEA.SA[2:0] (Space Attributes) */
82 #define _PAGE_PCC_IODYN 0x00000001	/* IO space, dynamically sized bus */
83 #define _PAGE_PCC_IO8	0x20000000	/* IO space, 8 bit bus */
84 #define _PAGE_PCC_IO16	0x20000001	/* IO space, 16 bit bus */
85 #define _PAGE_PCC_COM8	0x40000000	/* Common Memory space, 8 bit bus */
86 #define _PAGE_PCC_COM16	0x40000001	/* Common Memory space, 16 bit bus */
87 #define _PAGE_PCC_ATR8	0x60000000	/* Attribute Memory space, 8 bit bus */
88 #define _PAGE_PCC_ATR16	0x60000001	/* Attribute Memory space, 6 bit bus */
89 
90 #ifndef CONFIG_X2TLB
91 /* copy the ptea attributes */
92 static inline unsigned long copy_ptea_attributes(unsigned long x)
93 {
94 	return	((x >> 28) & 0xe) | (x & 0x1);
95 }
96 #endif
97 
98 /* Mask which drops unused bits from the PTEL value */
99 #if defined(CONFIG_CPU_SH3)
100 #define _PAGE_CLEAR_FLAGS	(_PAGE_PROTNONE | _PAGE_ACCESSED| \
101 				 _PAGE_FILE	| _PAGE_SZ1	| \
102 				 _PAGE_HW_SHARED)
103 #elif defined(CONFIG_X2TLB)
104 /* Get rid of the legacy PR/SZ bits when using extended mode */
105 #define _PAGE_CLEAR_FLAGS	(_PAGE_PROTNONE | _PAGE_ACCESSED | \
106 				 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
107 #else
108 #define _PAGE_CLEAR_FLAGS	(_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
109 #endif
110 
111 #define _PAGE_FLAGS_HARDWARE_MASK	(phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS))
112 
113 /* Hardware flags, page size encoding */
114 #if !defined(CONFIG_MMU)
115 # define _PAGE_FLAGS_HARD	0ULL
116 #elif defined(CONFIG_X2TLB)
117 # if defined(CONFIG_PAGE_SIZE_4KB)
118 #  define _PAGE_FLAGS_HARD	_PAGE_EXT(_PAGE_EXT_ESZ0)
119 # elif defined(CONFIG_PAGE_SIZE_8KB)
120 #  define _PAGE_FLAGS_HARD	_PAGE_EXT(_PAGE_EXT_ESZ1)
121 # elif defined(CONFIG_PAGE_SIZE_64KB)
122 #  define _PAGE_FLAGS_HARD	_PAGE_EXT(_PAGE_EXT_ESZ2)
123 # endif
124 #else
125 # if defined(CONFIG_PAGE_SIZE_4KB)
126 #  define _PAGE_FLAGS_HARD	_PAGE_SZ0
127 # elif defined(CONFIG_PAGE_SIZE_64KB)
128 #  define _PAGE_FLAGS_HARD	_PAGE_SZ1
129 # endif
130 #endif
131 
132 #if defined(CONFIG_X2TLB)
133 # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
134 #  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ2)
135 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
136 #  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
137 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
138 #  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
139 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
140 #  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ3)
141 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
142 #  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
143 # endif
144 #else
145 # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
146 #  define _PAGE_SZHUGE	(_PAGE_SZ1)
147 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
148 #  define _PAGE_SZHUGE	(_PAGE_SZ0 | _PAGE_SZ1)
149 # endif
150 #endif
151 
152 /*
153  * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
154  * to make pte_mkhuge() happy.
155  */
156 #ifndef _PAGE_SZHUGE
157 # define _PAGE_SZHUGE	(_PAGE_FLAGS_HARD)
158 #endif
159 
160 /*
161  * Mask of bits that are to be preserved accross pgprot changes.
162  */
163 #define _PAGE_CHG_MASK \
164 	(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \
165 	 _PAGE_DIRTY | _PAGE_SPECIAL)
166 
167 #ifndef __ASSEMBLY__
168 
169 #if defined(CONFIG_X2TLB) /* SH-X2 TLB */
170 #define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
171 				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
172 
173 #define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
174 				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
175 				 _PAGE_EXT(_PAGE_EXT_KERN_READ  | \
176 					   _PAGE_EXT_KERN_WRITE | \
177 					   _PAGE_EXT_USER_READ  | \
178 					   _PAGE_EXT_USER_WRITE))
179 
180 #define PAGE_EXECREAD	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
181 				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
182 				 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
183 					   _PAGE_EXT_KERN_READ | \
184 					   _PAGE_EXT_USER_EXEC | \
185 					   _PAGE_EXT_USER_READ))
186 
187 #define PAGE_COPY	PAGE_EXECREAD
188 
189 #define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
190 				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
191 				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
192 					   _PAGE_EXT_USER_READ))
193 
194 #define PAGE_WRITEONLY	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
195 				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
196 				 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
197 					   _PAGE_EXT_USER_WRITE))
198 
199 #define PAGE_RWX	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
200 				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
201 				 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
202 					   _PAGE_EXT_KERN_READ  | \
203 					   _PAGE_EXT_KERN_EXEC  | \
204 					   _PAGE_EXT_USER_WRITE | \
205 					   _PAGE_EXT_USER_READ  | \
206 					   _PAGE_EXT_USER_EXEC))
207 
208 #define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
209 				 _PAGE_DIRTY | _PAGE_ACCESSED | \
210 				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
211 				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
212 					   _PAGE_EXT_KERN_WRITE | \
213 					   _PAGE_EXT_KERN_EXEC))
214 
215 #define PAGE_KERNEL_NOCACHE \
216 			__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
217 				 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
218 				 _PAGE_FLAGS_HARD | \
219 				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
220 					   _PAGE_EXT_KERN_WRITE | \
221 					   _PAGE_EXT_KERN_EXEC))
222 
223 #define PAGE_KERNEL_RO	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
224 				 _PAGE_DIRTY | _PAGE_ACCESSED | \
225 				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
226 				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
227 					   _PAGE_EXT_KERN_EXEC))
228 
229 #define PAGE_KERNEL_PCC(slot, type) \
230 			__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
231 				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
232 				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
233 					   _PAGE_EXT_KERN_WRITE | \
234 					   _PAGE_EXT_KERN_EXEC) \
235 				 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
236 				 (type))
237 
238 #elif defined(CONFIG_MMU) /* SH-X TLB */
239 #define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
240 				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
241 
242 #define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
243 				 _PAGE_CACHABLE | _PAGE_ACCESSED | \
244 				 _PAGE_FLAGS_HARD)
245 
246 #define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
247 				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
248 
249 #define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
250 				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
251 
252 #define PAGE_EXECREAD	PAGE_READONLY
253 #define PAGE_RWX	PAGE_SHARED
254 #define PAGE_WRITEONLY	PAGE_SHARED
255 
256 #define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
257 				 _PAGE_DIRTY | _PAGE_ACCESSED | \
258 				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
259 
260 #define PAGE_KERNEL_NOCACHE \
261 			__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
262 				 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
263 				 _PAGE_FLAGS_HARD)
264 
265 #define PAGE_KERNEL_RO	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
266 				 _PAGE_DIRTY | _PAGE_ACCESSED | \
267 				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
268 
269 #define PAGE_KERNEL_PCC(slot, type) \
270 			__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
271 				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
272 				 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
273 				 (type))
274 #else /* no mmu */
275 #define PAGE_NONE		__pgprot(0)
276 #define PAGE_SHARED		__pgprot(0)
277 #define PAGE_COPY		__pgprot(0)
278 #define PAGE_EXECREAD		__pgprot(0)
279 #define PAGE_RWX		__pgprot(0)
280 #define PAGE_READONLY		__pgprot(0)
281 #define PAGE_WRITEONLY		__pgprot(0)
282 #define PAGE_KERNEL		__pgprot(0)
283 #define PAGE_KERNEL_NOCACHE	__pgprot(0)
284 #define PAGE_KERNEL_RO		__pgprot(0)
285 
286 #define PAGE_KERNEL_PCC(slot, type) \
287 				__pgprot(0)
288 #endif
289 
290 #endif /* __ASSEMBLY__ */
291 
292 #ifndef __ASSEMBLY__
293 
294 /*
295  * Certain architectures need to do special things when PTEs
296  * within a page table are directly modified.  Thus, the following
297  * hook is made available.
298  */
299 #ifdef CONFIG_X2TLB
300 static inline void set_pte(pte_t *ptep, pte_t pte)
301 {
302 	ptep->pte_high = pte.pte_high;
303 	smp_wmb();
304 	ptep->pte_low = pte.pte_low;
305 }
306 #else
307 #define set_pte(pteptr, pteval) (*(pteptr) = pteval)
308 #endif
309 
310 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
311 
312 /*
313  * (pmds are folded into pgds so this doesn't get actually called,
314  * but the define is needed for a generic inline function.)
315  */
316 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
317 
318 #define pfn_pte(pfn, prot) \
319 	__pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
320 #define pfn_pmd(pfn, prot) \
321 	__pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
322 
323 #define pte_none(x)		(!pte_val(x))
324 #define pte_present(x)		((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
325 
326 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
327 
328 #define pmd_none(x)	(!pmd_val(x))
329 #define pmd_present(x)	(pmd_val(x))
330 #define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
331 #define	pmd_bad(x)	(pmd_val(x) & ~PAGE_MASK)
332 
333 #define pages_to_mb(x)	((x) >> (20-PAGE_SHIFT))
334 #define pte_page(x)	pfn_to_page(pte_pfn(x))
335 
336 /*
337  * The following only work if pte_present() is true.
338  * Undefined behaviour if not..
339  */
340 #define pte_not_present(pte)	(!((pte).pte_low & _PAGE_PRESENT))
341 #define pte_dirty(pte)		((pte).pte_low & _PAGE_DIRTY)
342 #define pte_young(pte)		((pte).pte_low & _PAGE_ACCESSED)
343 #define pte_file(pte)		((pte).pte_low & _PAGE_FILE)
344 #define pte_special(pte)	((pte).pte_low & _PAGE_SPECIAL)
345 
346 #ifdef CONFIG_X2TLB
347 #define pte_write(pte) \
348 	((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE))
349 #else
350 #define pte_write(pte)		((pte).pte_low & _PAGE_RW)
351 #endif
352 
353 #define PTE_BIT_FUNC(h,fn,op) \
354 static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
355 
356 #ifdef CONFIG_X2TLB
357 /*
358  * We cheat a bit in the SH-X2 TLB case. As the permission bits are
359  * individually toggled (and user permissions are entirely decoupled from
360  * kernel permissions), we attempt to couple them a bit more sanely here.
361  */
362 PTE_BIT_FUNC(high, wrprotect, &= ~(_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE));
363 PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
364 PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
365 #else
366 PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
367 PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
368 PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
369 #endif
370 
371 PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
372 PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
373 PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
374 PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
375 PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL);
376 
377 #define __HAVE_ARCH_PTE_SPECIAL
378 
379 /*
380  * Macro and implementation to make a page protection as uncachable.
381  */
382 #define pgprot_writecombine(prot) \
383 	__pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
384 
385 #define pgprot_noncached	 pgprot_writecombine
386 
387 /*
388  * Conversion functions: convert a page and protection to a page entry,
389  * and a page entry and page directory to the page they refer to.
390  *
391  * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
392  */
393 #define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
394 
395 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
396 {
397 	pte.pte_low &= _PAGE_CHG_MASK;
398 	pte.pte_low |= pgprot_val(newprot);
399 
400 #ifdef CONFIG_X2TLB
401 	pte.pte_high |= pgprot_val(newprot) >> 32;
402 #endif
403 
404 	return pte;
405 }
406 
407 #define pmd_page_vaddr(pmd)	((unsigned long)pmd_val(pmd))
408 #define pmd_page(pmd)		(virt_to_page(pmd_val(pmd)))
409 
410 /* to find an entry in a page-table-directory. */
411 #define pgd_index(address)	(((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
412 #define pgd_offset(mm, address)	((mm)->pgd + pgd_index(address))
413 #define __pgd_offset(address)	pgd_index(address)
414 
415 /* to find an entry in a kernel page-table-directory */
416 #define pgd_offset_k(address)	pgd_offset(&init_mm, address)
417 
418 #define __pud_offset(address)	(((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
419 #define __pmd_offset(address)	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
420 
421 /* Find an entry in the third-level page table.. */
422 #define pte_index(address)	((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
423 #define __pte_offset(address)	pte_index(address)
424 
425 #define pte_offset_kernel(dir, address) \
426 	((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
427 #define pte_offset_map(dir, address)		pte_offset_kernel(dir, address)
428 #define pte_offset_map_nested(dir, address)	pte_offset_kernel(dir, address)
429 
430 #define pte_unmap(pte)		do { } while (0)
431 #define pte_unmap_nested(pte)	do { } while (0)
432 
433 #ifdef CONFIG_X2TLB
434 #define pte_ERROR(e) \
435 	printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
436 	       &(e), (e).pte_high, (e).pte_low)
437 #define pgd_ERROR(e) \
438 	printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
439 #else
440 #define pte_ERROR(e) \
441 	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
442 #define pgd_ERROR(e) \
443 	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
444 #endif
445 
446 /*
447  * Encode and de-code a swap entry
448  *
449  * Constraints:
450  *	_PAGE_FILE at bit 0
451  *	_PAGE_PRESENT at bit 8
452  *	_PAGE_PROTNONE at bit 9
453  *
454  * For the normal case, we encode the swap type into bits 0:7 and the
455  * swap offset into bits 10:30. For the 64-bit PTE case, we keep the
456  * preserved bits in the low 32-bits and use the upper 32 as the swap
457  * offset (along with a 5-bit type), following the same approach as x86
458  * PAE. This keeps the logic quite simple, and allows for a full 32
459  * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
460  * in the pte_low case.
461  *
462  * As is evident by the Alpha code, if we ever get a 64-bit unsigned
463  * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
464  * much cleaner..
465  *
466  * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
467  *       and _PAGE_PROTNONE bits
468  */
469 #ifdef CONFIG_X2TLB
470 #define __swp_type(x)			((x).val & 0x1f)
471 #define __swp_offset(x)			((x).val >> 5)
472 #define __swp_entry(type, offset)	((swp_entry_t){ (type) | (offset) << 5})
473 #define __pte_to_swp_entry(pte)		((swp_entry_t){ (pte).pte_high })
474 #define __swp_entry_to_pte(x)		((pte_t){ 0, (x).val })
475 
476 /*
477  * Encode and decode a nonlinear file mapping entry
478  */
479 #define pte_to_pgoff(pte)		((pte).pte_high)
480 #define pgoff_to_pte(off)		((pte_t) { _PAGE_FILE, (off) })
481 
482 #define PTE_FILE_MAX_BITS		32
483 #else
484 #define __swp_type(x)			((x).val & 0xff)
485 #define __swp_offset(x)			((x).val >> 10)
486 #define __swp_entry(type, offset)	((swp_entry_t){(type) | (offset) <<10})
487 
488 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) >> 1 })
489 #define __swp_entry_to_pte(x)		((pte_t) { (x).val << 1 })
490 
491 /*
492  * Encode and decode a nonlinear file mapping entry
493  */
494 #define PTE_FILE_MAX_BITS	29
495 #define pte_to_pgoff(pte)	(pte_val(pte) >> 1)
496 #define pgoff_to_pte(off)	((pte_t) { ((off) << 1) | _PAGE_FILE })
497 #endif
498 
499 #endif /* __ASSEMBLY__ */
500 #endif /* __ASM_SH_PGTABLE_32_H */
501