1 #ifndef __ASM_SH_PGTABLE_32_H 2 #define __ASM_SH_PGTABLE_32_H 3 4 /* 5 * Linux PTEL encoding. 6 * 7 * Hardware and software bit definitions for the PTEL value (see below for 8 * notes on SH-X2 MMUs and 64-bit PTEs): 9 * 10 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). 11 * 12 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the 13 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, 14 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). 15 * 16 * In order to keep this relatively clean, do not use these for defining 17 * SH-3 specific flags until all of the other unused bits have been 18 * exhausted. 19 * 20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. 21 * 22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. 23 * Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL. 24 * 25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes 26 * and timing control which (together with bit 0) are moved into the 27 * old-style PTEA on the parts that support it. 28 * 29 * SH-X2 MMUs and extended PTEs 30 * 31 * SH-X2 supports an extended mode TLB with split data arrays due to the 32 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and 33 * SZ bit placeholders still exist in data array 1, but are implemented as 34 * reserved bits, with the real logic existing in data array 2. 35 * 36 * The downside to this is that we can no longer fit everything in to a 32-bit 37 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus 38 * side, this gives us quite a few spare bits to play with for future usage. 39 */ 40 /* Legacy and compat mode bits */ 41 #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ 42 #define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ 43 #define _PAGE_DIRTY 0x004 /* D-bit : page changed */ 44 #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ 45 #define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ 46 #define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ 47 #define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ 48 #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ 49 #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ 50 #define _PAGE_PROTNONE 0x200 /* software: if not present */ 51 #define _PAGE_ACCESSED 0x400 /* software: page referenced */ 52 #define _PAGE_SPECIAL 0x800 /* software: special page */ 53 54 #define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) 55 #define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) 56 57 /* Extended mode bits */ 58 #define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ 59 #define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ 60 #define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ 61 #define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ 62 63 #define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ 64 #define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ 65 #define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ 66 67 #define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ 68 #define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 69 #define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 70 71 #define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */ 72 73 /* Wrapper for extended mode pgprot twiddling */ 74 #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 75 76 #ifdef CONFIG_X2TLB 77 #define _PAGE_PCC_MASK 0x00000000 /* No legacy PTEA support */ 78 #else 79 80 /* software: moves to PTEA.TC (Timing Control) */ 81 #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ 82 #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ 83 84 /* software: moves to PTEA.SA[2:0] (Space Attributes) */ 85 #define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ 86 #define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ 87 #define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ 88 #define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ 89 #define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ 90 #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 91 #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 92 93 #define _PAGE_PCC_MASK 0xe0000001 94 95 /* copy the ptea attributes */ 96 static inline unsigned long copy_ptea_attributes(unsigned long x) 97 { 98 return ((x >> 28) & 0xe) | (x & 0x1); 99 } 100 #endif 101 102 /* Mask which drops unused bits from the PTEL value */ 103 #if defined(CONFIG_CPU_SH3) 104 #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ 105 _PAGE_SZ1 | _PAGE_HW_SHARED) 106 #elif defined(CONFIG_X2TLB) 107 /* Get rid of the legacy PR/SZ bits when using extended mode */ 108 #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \ 109 _PAGE_PR_MASK | _PAGE_SZ_MASK) 110 #else 111 #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED) 112 #endif 113 114 #define _PAGE_FLAGS_HARDWARE_MASK (phys_addr_mask() & ~(_PAGE_CLEAR_FLAGS)) 115 116 /* Hardware flags, page size encoding */ 117 #if !defined(CONFIG_MMU) 118 # define _PAGE_FLAGS_HARD 0ULL 119 #elif defined(CONFIG_X2TLB) 120 # if defined(CONFIG_PAGE_SIZE_4KB) 121 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) 122 # elif defined(CONFIG_PAGE_SIZE_8KB) 123 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) 124 # elif defined(CONFIG_PAGE_SIZE_64KB) 125 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) 126 # endif 127 #else 128 # if defined(CONFIG_PAGE_SIZE_4KB) 129 # define _PAGE_FLAGS_HARD _PAGE_SZ0 130 # elif defined(CONFIG_PAGE_SIZE_64KB) 131 # define _PAGE_FLAGS_HARD _PAGE_SZ1 132 # endif 133 #endif 134 135 #if defined(CONFIG_X2TLB) 136 # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 137 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) 138 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) 139 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) 140 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 141 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) 142 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) 143 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) 144 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 145 # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) 146 # endif 147 # define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED)) 148 #else 149 # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 150 # define _PAGE_SZHUGE (_PAGE_SZ1) 151 # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) 152 # define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) 153 # endif 154 # define _PAGE_WIRED (0) 155 #endif 156 157 /* 158 * Stub out _PAGE_SZHUGE if we don't have a good definition for it, 159 * to make pte_mkhuge() happy. 160 */ 161 #ifndef _PAGE_SZHUGE 162 # define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) 163 #endif 164 165 /* 166 * Mask of bits that are to be preserved across pgprot changes. 167 */ 168 #define _PAGE_CHG_MASK \ 169 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ 170 _PAGE_DIRTY | _PAGE_SPECIAL) 171 172 #ifndef __ASSEMBLY__ 173 174 #if defined(CONFIG_X2TLB) /* SH-X2 TLB */ 175 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 176 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 177 178 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 179 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 180 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 181 _PAGE_EXT_KERN_WRITE | \ 182 _PAGE_EXT_USER_READ | \ 183 _PAGE_EXT_USER_WRITE)) 184 185 #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 186 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 187 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \ 188 _PAGE_EXT_KERN_READ | \ 189 _PAGE_EXT_USER_EXEC | \ 190 _PAGE_EXT_USER_READ)) 191 192 #define PAGE_COPY PAGE_EXECREAD 193 194 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 195 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 196 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 197 _PAGE_EXT_USER_READ)) 198 199 #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 200 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 201 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ 202 _PAGE_EXT_USER_WRITE)) 203 204 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ 205 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ 206 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ 207 _PAGE_EXT_KERN_READ | \ 208 _PAGE_EXT_KERN_EXEC | \ 209 _PAGE_EXT_USER_WRITE | \ 210 _PAGE_EXT_USER_READ | \ 211 _PAGE_EXT_USER_EXEC)) 212 213 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 214 _PAGE_DIRTY | _PAGE_ACCESSED | \ 215 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ 216 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 217 _PAGE_EXT_KERN_WRITE | \ 218 _PAGE_EXT_KERN_EXEC)) 219 220 #define PAGE_KERNEL_NOCACHE \ 221 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ 222 _PAGE_ACCESSED | _PAGE_HW_SHARED | \ 223 _PAGE_FLAGS_HARD | \ 224 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 225 _PAGE_EXT_KERN_WRITE | \ 226 _PAGE_EXT_KERN_EXEC)) 227 228 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 229 _PAGE_DIRTY | _PAGE_ACCESSED | \ 230 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ 231 _PAGE_EXT(_PAGE_EXT_KERN_READ | \ 232 _PAGE_EXT_KERN_EXEC)) 233 234 #define PAGE_KERNEL_PCC(slot, type) \ 235 __pgprot(0) 236 237 #elif defined(CONFIG_MMU) /* SH-X TLB */ 238 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 239 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 240 241 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ 242 _PAGE_CACHABLE | _PAGE_ACCESSED | \ 243 _PAGE_FLAGS_HARD) 244 245 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ 246 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 247 248 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ 249 _PAGE_ACCESSED | _PAGE_FLAGS_HARD) 250 251 #define PAGE_EXECREAD PAGE_READONLY 252 #define PAGE_RWX PAGE_SHARED 253 #define PAGE_WRITEONLY PAGE_SHARED 254 255 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ 256 _PAGE_DIRTY | _PAGE_ACCESSED | \ 257 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 258 259 #define PAGE_KERNEL_NOCACHE \ 260 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ 261 _PAGE_ACCESSED | _PAGE_HW_SHARED | \ 262 _PAGE_FLAGS_HARD) 263 264 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ 265 _PAGE_DIRTY | _PAGE_ACCESSED | \ 266 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) 267 268 #define PAGE_KERNEL_PCC(slot, type) \ 269 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ 270 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ 271 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ 272 (type)) 273 #else /* no mmu */ 274 #define PAGE_NONE __pgprot(0) 275 #define PAGE_SHARED __pgprot(0) 276 #define PAGE_COPY __pgprot(0) 277 #define PAGE_EXECREAD __pgprot(0) 278 #define PAGE_RWX __pgprot(0) 279 #define PAGE_READONLY __pgprot(0) 280 #define PAGE_WRITEONLY __pgprot(0) 281 #define PAGE_KERNEL __pgprot(0) 282 #define PAGE_KERNEL_NOCACHE __pgprot(0) 283 #define PAGE_KERNEL_RO __pgprot(0) 284 285 #define PAGE_KERNEL_PCC(slot, type) \ 286 __pgprot(0) 287 #endif 288 289 #endif /* __ASSEMBLY__ */ 290 291 #ifndef __ASSEMBLY__ 292 293 /* 294 * Certain architectures need to do special things when PTEs 295 * within a page table are directly modified. Thus, the following 296 * hook is made available. 297 */ 298 #ifdef CONFIG_X2TLB 299 static inline void set_pte(pte_t *ptep, pte_t pte) 300 { 301 ptep->pte_high = pte.pte_high; 302 smp_wmb(); 303 ptep->pte_low = pte.pte_low; 304 } 305 #else 306 #define set_pte(pteptr, pteval) (*(pteptr) = pteval) 307 #endif 308 309 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 310 311 /* 312 * (pmds are folded into pgds so this doesn't get actually called, 313 * but the define is needed for a generic inline function.) 314 */ 315 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) 316 317 #define pfn_pte(pfn, prot) \ 318 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) 319 #define pfn_pmd(pfn, prot) \ 320 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) 321 322 #define pte_none(x) (!pte_val(x)) 323 #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) 324 325 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) 326 327 #define pmd_none(x) (!pmd_val(x)) 328 #define pmd_present(x) (pmd_val(x)) 329 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 330 #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) 331 332 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) 333 #define pte_page(x) pfn_to_page(pte_pfn(x)) 334 335 /* 336 * The following only work if pte_present() is true. 337 * Undefined behaviour if not.. 338 */ 339 #define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) 340 #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) 341 #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) 342 #define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL) 343 344 #ifdef CONFIG_X2TLB 345 #define pte_write(pte) \ 346 ((pte).pte_high & (_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE)) 347 #else 348 #define pte_write(pte) ((pte).pte_low & _PAGE_RW) 349 #endif 350 351 #define PTE_BIT_FUNC(h,fn,op) \ 352 static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } 353 354 #ifdef CONFIG_X2TLB 355 /* 356 * We cheat a bit in the SH-X2 TLB case. As the permission bits are 357 * individually toggled (and user permissions are entirely decoupled from 358 * kernel permissions), we attempt to couple them a bit more sanely here. 359 */ 360 PTE_BIT_FUNC(high, wrprotect, &= ~(_PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE)); 361 PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); 362 PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); 363 #else 364 PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); 365 PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW); 366 PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); 367 #endif 368 369 PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); 370 PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); 371 PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); 372 PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); 373 PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL); 374 375 /* 376 * Macro and implementation to make a page protection as uncachable. 377 */ 378 #define pgprot_writecombine(prot) \ 379 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) 380 381 #define pgprot_noncached pgprot_writecombine 382 383 /* 384 * Conversion functions: convert a page and protection to a page entry, 385 * and a page entry and page directory to the page they refer to. 386 * 387 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) 388 */ 389 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 390 391 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 392 { 393 pte.pte_low &= _PAGE_CHG_MASK; 394 pte.pte_low |= pgprot_val(newprot); 395 396 #ifdef CONFIG_X2TLB 397 pte.pte_high |= pgprot_val(newprot) >> 32; 398 #endif 399 400 return pte; 401 } 402 403 #define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd)) 404 #define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) 405 406 /* to find an entry in a page-table-directory. */ 407 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) 408 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 409 #define __pgd_offset(address) pgd_index(address) 410 411 /* to find an entry in a kernel page-table-directory */ 412 #define pgd_offset_k(address) pgd_offset(&init_mm, address) 413 414 #define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) 415 #define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) 416 417 /* Find an entry in the third-level page table.. */ 418 #define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 419 #define __pte_offset(address) pte_index(address) 420 421 #define pte_offset_kernel(dir, address) \ 422 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) 423 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) 424 #define pte_unmap(pte) do { } while (0) 425 426 #ifdef CONFIG_X2TLB 427 #define pte_ERROR(e) \ 428 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ 429 &(e), (e).pte_high, (e).pte_low) 430 #define pgd_ERROR(e) \ 431 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e)) 432 #else 433 #define pte_ERROR(e) \ 434 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 435 #define pgd_ERROR(e) \ 436 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 437 #endif 438 439 /* 440 * Encode and de-code a swap entry 441 * 442 * Constraints: 443 * _PAGE_PRESENT at bit 8 444 * _PAGE_PROTNONE at bit 9 445 * 446 * For the normal case, we encode the swap type into bits 0:7 and the 447 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the 448 * preserved bits in the low 32-bits and use the upper 32 as the swap 449 * offset (along with a 5-bit type), following the same approach as x86 450 * PAE. This keeps the logic quite simple. 451 * 452 * As is evident by the Alpha code, if we ever get a 64-bit unsigned 453 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes 454 * much cleaner.. 455 * 456 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT 457 * and _PAGE_PROTNONE bits 458 */ 459 #ifdef CONFIG_X2TLB 460 #define __swp_type(x) ((x).val & 0x1f) 461 #define __swp_offset(x) ((x).val >> 5) 462 #define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5}) 463 #define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) 464 #define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) 465 466 #else 467 #define __swp_type(x) ((x).val & 0xff) 468 #define __swp_offset(x) ((x).val >> 10) 469 #define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10}) 470 471 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) 472 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) 473 #endif 474 475 #endif /* __ASSEMBLY__ */ 476 #endif /* __ASM_SH_PGTABLE_32_H */ 477