1 #ifndef __ASM_SH_IRQ_H 2 #define __ASM_SH_IRQ_H 3 4 #include <linux/cpumask.h> 5 #include <asm/machvec.h> 6 7 /* 8 * Only legacy non-sparseirq platforms have to set a reasonably sane 9 * value here. sparseirq platforms allocate their irq_descs on the fly, 10 * so will expand automatically based on the number of registered IRQs. 11 */ 12 #ifdef CONFIG_SPARSE_IRQ 13 # define NR_IRQS 8 14 #else 15 # define NR_IRQS 512 16 #endif 17 18 /* 19 * This is a special IRQ number for indicating that no IRQ has been 20 * triggered and to simply ignore the IRQ dispatch. This is a special 21 * case that can happen with IRQ auto-distribution when multiple CPUs 22 * are woken up and signalled in parallel. 23 */ 24 #define NO_IRQ_IGNORE ((unsigned int)-1) 25 26 /* 27 * Simple Mask Register Support 28 */ 29 extern void make_maskreg_irq(unsigned int irq); 30 extern unsigned short *irq_mask_register; 31 32 /* 33 * PINT IRQs 34 */ 35 void init_IRQ_pint(void); 36 void make_imask_irq(unsigned int irq); 37 38 static inline int generic_irq_demux(int irq) 39 { 40 return irq; 41 } 42 43 #define irq_demux(irq) sh_mv.mv_irq_demux(irq) 44 45 void init_IRQ(void); 46 void migrate_irqs(void); 47 48 asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs); 49 50 #ifdef CONFIG_IRQSTACKS 51 extern void irq_ctx_init(int cpu); 52 extern void irq_ctx_exit(int cpu); 53 # define __ARCH_HAS_DO_SOFTIRQ 54 #else 55 # define irq_ctx_init(cpu) do { } while (0) 56 # define irq_ctx_exit(cpu) do { } while (0) 57 #endif 58 59 #ifdef CONFIG_INTC_BALANCING 60 extern unsigned int irq_lookup(unsigned int irq); 61 extern void irq_finish(unsigned int irq); 62 #else 63 #define irq_lookup(irq) (irq) 64 #define irq_finish(irq) do { } while (0) 65 #endif 66 67 #include <asm-generic/irq.h> 68 #ifdef CONFIG_CPU_SH5 69 #include <cpu/irq.h> 70 #endif 71 72 #endif /* __ASM_SH_IRQ_H */ 73