1f15cbe6fSPaul Mundt /* 2f15cbe6fSPaul Mundt * MMIO/IRQ and platform data for SH7760 I2C channels 3f15cbe6fSPaul Mundt */ 4f15cbe6fSPaul Mundt 5f15cbe6fSPaul Mundt #ifndef _I2C_SH7760_H_ 6f15cbe6fSPaul Mundt #define _I2C_SH7760_H_ 7f15cbe6fSPaul Mundt 8f15cbe6fSPaul Mundt #define SH7760_I2C_DEVNAME "sh7760-i2c" 9f15cbe6fSPaul Mundt 10f15cbe6fSPaul Mundt #define SH7760_I2C0_MMIO 0xFE140000 11f15cbe6fSPaul Mundt #define SH7760_I2C0_MMIOEND 0xFE14003B 12f15cbe6fSPaul Mundt #define SH7760_I2C0_IRQ 62 13f15cbe6fSPaul Mundt 14f15cbe6fSPaul Mundt #define SH7760_I2C1_MMIO 0xFE150000 15f15cbe6fSPaul Mundt #define SH7760_I2C1_MMIOEND 0xFE15003B 16f15cbe6fSPaul Mundt #define SH7760_I2C1_IRQ 63 17f15cbe6fSPaul Mundt 18f15cbe6fSPaul Mundt struct sh7760_i2c_platdata { 19f15cbe6fSPaul Mundt unsigned int speed_khz; 20f15cbe6fSPaul Mundt }; 21f15cbe6fSPaul Mundt 22f15cbe6fSPaul Mundt #endif 23