xref: /openbmc/linux/arch/sh/include/asm/hw_irq.h (revision b2441318)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2f15cbe6fSPaul Mundt #ifndef __ASM_SH_HW_IRQ_H
3f15cbe6fSPaul Mundt #define __ASM_SH_HW_IRQ_H
4f15cbe6fSPaul Mundt 
5f15cbe6fSPaul Mundt #include <linux/init.h>
6bbfbd8b1SPaul Mundt #include <linux/sh_intc.h>
760063497SArun Sharma #include <linux/atomic.h>
8f15cbe6fSPaul Mundt 
9f15cbe6fSPaul Mundt extern atomic_t irq_err_count;
10f15cbe6fSPaul Mundt 
11f15cbe6fSPaul Mundt struct ipr_data {
12f15cbe6fSPaul Mundt 	unsigned char irq;
13f15cbe6fSPaul Mundt 	unsigned char ipr_idx;		/* Index for the IPR registered */
14f15cbe6fSPaul Mundt 	unsigned char shift;		/* Number of bits to shift the data */
15f15cbe6fSPaul Mundt 	unsigned char priority;		/* The priority */
16f15cbe6fSPaul Mundt };
17f15cbe6fSPaul Mundt 
18f15cbe6fSPaul Mundt struct ipr_desc {
19f15cbe6fSPaul Mundt 	unsigned long *ipr_offsets;
20f15cbe6fSPaul Mundt 	unsigned int nr_offsets;
21f15cbe6fSPaul Mundt 	struct ipr_data *ipr_data;
22f15cbe6fSPaul Mundt 	unsigned int nr_irqs;
23f15cbe6fSPaul Mundt 	struct irq_chip chip;
24f15cbe6fSPaul Mundt };
25f15cbe6fSPaul Mundt 
26f15cbe6fSPaul Mundt void register_ipr_controller(struct ipr_desc *);
27f15cbe6fSPaul Mundt 
28f15cbe6fSPaul Mundt void __init plat_irq_setup(void);
29f15cbe6fSPaul Mundt void __init plat_irq_setup_sh3(void);
30bbfbd8b1SPaul Mundt void __init plat_irq_setup_pins(int mode);
31f15cbe6fSPaul Mundt 
32f15cbe6fSPaul Mundt enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
33f15cbe6fSPaul Mundt        IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
34f15cbe6fSPaul Mundt        IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
35f15cbe6fSPaul Mundt 
36f15cbe6fSPaul Mundt #endif /* __ASM_SH_HW_IRQ_H */
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