xref: /openbmc/linux/arch/sh/include/asm/clock.h (revision 6881e8bf)
1 #ifndef __ASM_SH_CLOCK_H
2 #define __ASM_SH_CLOCK_H
3 
4 #include <linux/list.h>
5 #include <linux/seq_file.h>
6 #include <linux/clk.h>
7 #include <linux/err.h>
8 
9 struct clk;
10 
11 struct clk_ops {
12 	void (*init)(struct clk *clk);
13 	int (*enable)(struct clk *clk);
14 	void (*disable)(struct clk *clk);
15 	unsigned long (*recalc)(struct clk *clk);
16 	int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
17 	int (*set_parent)(struct clk *clk, struct clk *parent);
18 	long (*round_rate)(struct clk *clk, unsigned long rate);
19 };
20 
21 struct clk {
22 	struct list_head	node;
23 	const char		*name;
24 	int			id;
25 	struct module		*owner;
26 
27 	struct clk		*parent;
28 	struct clk_ops		*ops;
29 
30 	struct list_head	children;
31 	struct list_head	sibling;	/* node for children */
32 
33 	int			usecount;
34 
35 	unsigned long		rate;
36 	unsigned long		flags;
37 
38 	void __iomem		*enable_reg;
39 	unsigned int		enable_bit;
40 
41 	unsigned long		arch_flags;
42 	void			*priv;
43 	struct dentry		*dentry;
44 };
45 
46 struct clk_lookup {
47 	struct list_head	node;
48 	const char		*dev_id;
49 	const char		*con_id;
50 	struct clk		*clk;
51 };
52 
53 #define CLK_ENABLE_ON_INIT	(1 << 0)
54 
55 /* Should be defined by processor-specific code */
56 void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
57 int __init arch_clk_init(void);
58 
59 /* arch/sh/kernel/cpu/clock.c */
60 int clk_init(void);
61 unsigned long followparent_recalc(struct clk *);
62 void recalculate_root_clocks(void);
63 void propagate_rate(struct clk *);
64 int clk_reparent(struct clk *child, struct clk *parent);
65 int clk_register(struct clk *);
66 void clk_unregister(struct clk *);
67 
68 /* arch/sh/kernel/cpu/clock-cpg.c */
69 int __init __deprecated cpg_clk_init(void);
70 
71 /* the exported API, in addition to clk_set_rate */
72 /**
73  * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
74  * @clk: clock source
75  * @rate: desired clock rate in Hz
76  * @algo_id: algorithm id to be passed down to ops->set_rate
77  *
78  * Returns success (0) or negative errno.
79  */
80 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
81 
82 enum clk_sh_algo_id {
83 	NO_CHANGE = 0,
84 
85 	IUS_N1_N1,
86 	IUS_322,
87 	IUS_522,
88 	IUS_N11,
89 
90 	SB_N1,
91 
92 	SB3_N1,
93 	SB3_32,
94 	SB3_43,
95 	SB3_54,
96 
97 	BP_N1,
98 
99 	IP_N1,
100 };
101 
102 struct clk_div_mult_table {
103 	unsigned int *divisors;
104 	unsigned int nr_divisors;
105 	unsigned int *multipliers;
106 	unsigned int nr_multipliers;
107 };
108 
109 struct cpufreq_frequency_table;
110 void clk_rate_table_build(struct clk *clk,
111 			  struct cpufreq_frequency_table *freq_table,
112 			  int nr_freqs,
113 			  struct clk_div_mult_table *src_table,
114 			  unsigned long *bitmap);
115 
116 long clk_rate_table_round(struct clk *clk,
117 			  struct cpufreq_frequency_table *freq_table,
118 			  unsigned long rate);
119 
120 #define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg,	\
121 	    _enable_bit, _flags)			\
122 {							\
123 	.name		= _name,			\
124 	.id		= _id,				\
125 	.parent		= _parent,			\
126 	.enable_reg	= (void __iomem *)_enable_reg,	\
127 	.enable_bit	= _enable_bit,			\
128 	.flags		= _flags,			\
129 }
130 
131 int sh_clk_mstp32_register(struct clk *clks, int nr);
132 
133 #endif /* __ASM_SH_CLOCK_H */
134