xref: /openbmc/linux/arch/sh/include/asm/clock.h (revision 384740dc)
1 #ifndef __ASM_SH_CLOCK_H
2 #define __ASM_SH_CLOCK_H
3 
4 #include <linux/kref.h>
5 #include <linux/list.h>
6 #include <linux/seq_file.h>
7 #include <linux/clk.h>
8 #include <linux/err.h>
9 
10 struct clk;
11 
12 struct clk_ops {
13 	void (*init)(struct clk *clk);
14 	void (*enable)(struct clk *clk);
15 	void (*disable)(struct clk *clk);
16 	void (*recalc)(struct clk *clk);
17 	int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
18 	long (*round_rate)(struct clk *clk, unsigned long rate);
19 };
20 
21 struct clk {
22 	struct list_head	node;
23 	const char		*name;
24 	int			id;
25 	struct module		*owner;
26 
27 	struct clk		*parent;
28 	struct clk_ops		*ops;
29 
30 	struct kref		kref;
31 
32 	unsigned long		rate;
33 	unsigned long		flags;
34 	unsigned long		arch_flags;
35 };
36 
37 #define CLK_ALWAYS_ENABLED	(1 << 0)
38 #define CLK_RATE_PROPAGATES	(1 << 1)
39 
40 /* Should be defined by processor-specific code */
41 void arch_init_clk_ops(struct clk_ops **, int type);
42 
43 /* arch/sh/kernel/cpu/clock.c */
44 int clk_init(void);
45 
46 void clk_recalc_rate(struct clk *);
47 
48 int clk_register(struct clk *);
49 void clk_unregister(struct clk *);
50 
51 static inline int clk_always_enable(const char *id)
52 {
53 	struct clk *clk;
54 	int ret;
55 
56 	clk = clk_get(NULL, id);
57 	if (IS_ERR(clk))
58 		return PTR_ERR(clk);
59 
60 	ret = clk_enable(clk);
61 	if (ret)
62 		clk_put(clk);
63 
64 	return ret;
65 }
66 
67 /* the exported API, in addition to clk_set_rate */
68 /**
69  * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
70  * @clk: clock source
71  * @rate: desired clock rate in Hz
72  * @algo_id: algorithm id to be passed down to ops->set_rate
73  *
74  * Returns success (0) or negative errno.
75  */
76 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
77 
78 enum clk_sh_algo_id {
79 	NO_CHANGE = 0,
80 
81 	IUS_N1_N1,
82 	IUS_322,
83 	IUS_522,
84 	IUS_N11,
85 
86 	SB_N1,
87 
88 	SB3_N1,
89 	SB3_32,
90 	SB3_43,
91 	SB3_54,
92 
93 	BP_N1,
94 
95 	IP_N1,
96 };
97 #endif /* __ASM_SH_CLOCK_H */
98