xref: /openbmc/linux/arch/sh/drivers/pci/pci.c (revision f7777dcc)
1 /*
2  * New-style PCI core.
3  *
4  * Copyright (c) 2004 - 2009  Paul Mundt
5  * Copyright (c) 2002  M. R. Brown
6  *
7  * Modelled after arch/mips/pci/pci.c:
8  *  Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file "COPYING" in the main directory of this archive
12  * for more details.
13  */
14 #include <linux/kernel.h>
15 #include <linux/mm.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/types.h>
19 #include <linux/dma-debug.h>
20 #include <linux/io.h>
21 #include <linux/mutex.h>
22 #include <linux/spinlock.h>
23 #include <linux/export.h>
24 
25 unsigned long PCIBIOS_MIN_IO = 0x0000;
26 unsigned long PCIBIOS_MIN_MEM = 0;
27 
28 /*
29  * The PCI controller list.
30  */
31 static struct pci_channel *hose_head, **hose_tail = &hose_head;
32 
33 static int pci_initialized;
34 
35 static void pcibios_scanbus(struct pci_channel *hose)
36 {
37 	static int next_busno;
38 	static int need_domain_info;
39 	LIST_HEAD(resources);
40 	struct resource *res;
41 	resource_size_t offset;
42 	int i;
43 	struct pci_bus *bus;
44 
45 	for (i = 0; i < hose->nr_resources; i++) {
46 		res = hose->resources + i;
47 		offset = 0;
48 		if (res->flags & IORESOURCE_IO)
49 			offset = hose->io_offset;
50 		else if (res->flags & IORESOURCE_MEM)
51 			offset = hose->mem_offset;
52 		pci_add_resource_offset(&resources, res, offset);
53 	}
54 
55 	bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
56 				&resources);
57 	hose->bus = bus;
58 
59 	need_domain_info = need_domain_info || hose->index;
60 	hose->need_domain_info = need_domain_info;
61 	if (bus) {
62 		next_busno = bus->busn_res.end + 1;
63 		/* Don't allow 8-bit bus number overflow inside the hose -
64 		   reserve some space for bridges. */
65 		if (next_busno > 224) {
66 			next_busno = 0;
67 			need_domain_info = 1;
68 		}
69 
70 		pci_bus_size_bridges(bus);
71 		pci_bus_assign_resources(bus);
72 	} else {
73 		pci_free_resource_list(&resources);
74 	}
75 }
76 
77 /*
78  * This interrupt-safe spinlock protects all accesses to PCI
79  * configuration space.
80  */
81 DEFINE_RAW_SPINLOCK(pci_config_lock);
82 static DEFINE_MUTEX(pci_scan_mutex);
83 
84 int register_pci_controller(struct pci_channel *hose)
85 {
86 	int i;
87 
88 	for (i = 0; i < hose->nr_resources; i++) {
89 		struct resource *res = hose->resources + i;
90 
91 		if (res->flags & IORESOURCE_IO) {
92 			if (request_resource(&ioport_resource, res) < 0)
93 				goto out;
94 		} else {
95 			if (request_resource(&iomem_resource, res) < 0)
96 				goto out;
97 		}
98 	}
99 
100 	*hose_tail = hose;
101 	hose_tail = &hose->next;
102 
103 	/*
104 	 * Do not panic here but later - this might happen before console init.
105 	 */
106 	if (!hose->io_map_base) {
107 		printk(KERN_WARNING
108 		       "registering PCI controller with io_map_base unset\n");
109 	}
110 
111 	/*
112 	 * Setup the ERR/PERR and SERR timers, if available.
113 	 */
114 	pcibios_enable_timers(hose);
115 
116 	/*
117 	 * Scan the bus if it is register after the PCI subsystem
118 	 * initialization.
119 	 */
120 	if (pci_initialized) {
121 		mutex_lock(&pci_scan_mutex);
122 		pcibios_scanbus(hose);
123 		mutex_unlock(&pci_scan_mutex);
124 	}
125 
126 	return 0;
127 
128 out:
129 	for (--i; i >= 0; i--)
130 		release_resource(&hose->resources[i]);
131 
132 	printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
133 	return -1;
134 }
135 
136 static int __init pcibios_init(void)
137 {
138 	struct pci_channel *hose;
139 
140 	/* Scan all of the recorded PCI controllers.  */
141 	for (hose = hose_head; hose; hose = hose->next)
142 		pcibios_scanbus(hose);
143 
144 	pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
145 
146 	dma_debug_add_bus(&pci_bus_type);
147 
148 	pci_initialized = 1;
149 
150 	return 0;
151 }
152 subsys_initcall(pcibios_init);
153 
154 /*
155  *  Called after each bus is probed, but before its children
156  *  are examined.
157  */
158 void pcibios_fixup_bus(struct pci_bus *bus)
159 {
160 }
161 
162 /*
163  * We need to avoid collisions with `mirrored' VGA ports
164  * and other strange ISA hardware, so we always want the
165  * addresses to be allocated in the 0x000-0x0ff region
166  * modulo 0x400.
167  */
168 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
169 				resource_size_t size, resource_size_t align)
170 {
171 	struct pci_dev *dev = data;
172 	struct pci_channel *hose = dev->sysdata;
173 	resource_size_t start = res->start;
174 
175 	if (res->flags & IORESOURCE_IO) {
176 		if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
177 			start = PCIBIOS_MIN_IO + hose->resources[0].start;
178 
179 		/*
180                  * Put everything into 0x00-0xff region modulo 0x400.
181 		 */
182 		if (start & 0x300)
183 			start = (start + 0x3ff) & ~0x3ff;
184 	}
185 
186 	return start;
187 }
188 
189 int pcibios_enable_device(struct pci_dev *dev, int mask)
190 {
191 	return pci_enable_resources(dev, mask);
192 }
193 
194 static void __init
195 pcibios_bus_report_status_early(struct pci_channel *hose,
196 				int top_bus, int current_bus,
197 				unsigned int status_mask, int warn)
198 {
199 	unsigned int pci_devfn;
200 	u16 status;
201 	int ret;
202 
203 	for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
204 		if (PCI_FUNC(pci_devfn))
205 			continue;
206 		ret = early_read_config_word(hose, top_bus, current_bus,
207 					     pci_devfn, PCI_STATUS, &status);
208 		if (ret != PCIBIOS_SUCCESSFUL)
209 			continue;
210 		if (status == 0xffff)
211 			continue;
212 
213 		early_write_config_word(hose, top_bus, current_bus,
214 					pci_devfn, PCI_STATUS,
215 					status & status_mask);
216 		if (warn)
217 			printk("(%02x:%02x: %04X) ", current_bus,
218 			       pci_devfn, status);
219 	}
220 }
221 
222 /*
223  * We can't use pci_find_device() here since we are
224  * called from interrupt context.
225  */
226 static void __init_refok
227 pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
228 			  int warn)
229 {
230 	struct pci_dev *dev;
231 
232 	list_for_each_entry(dev, &bus->devices, bus_list) {
233 		u16 status;
234 
235 		/*
236 		 * ignore host bridge - we handle
237 		 * that separately
238 		 */
239 		if (dev->bus->number == 0 && dev->devfn == 0)
240 			continue;
241 
242 		pci_read_config_word(dev, PCI_STATUS, &status);
243 		if (status == 0xffff)
244 			continue;
245 
246 		if ((status & status_mask) == 0)
247 			continue;
248 
249 		/* clear the status errors */
250 		pci_write_config_word(dev, PCI_STATUS, status & status_mask);
251 
252 		if (warn)
253 			printk("(%s: %04X) ", pci_name(dev), status);
254 	}
255 
256 	list_for_each_entry(dev, &bus->devices, bus_list)
257 		if (dev->subordinate)
258 			pcibios_bus_report_status(dev->subordinate, status_mask, warn);
259 }
260 
261 void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
262 {
263 	struct pci_channel *hose;
264 
265 	for (hose = hose_head; hose; hose = hose->next) {
266 		if (unlikely(!hose->bus))
267 			pcibios_bus_report_status_early(hose, hose_head->index,
268 					hose->index, status_mask, warn);
269 		else
270 			pcibios_bus_report_status(hose->bus, status_mask, warn);
271 	}
272 }
273 
274 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
275 			enum pci_mmap_state mmap_state, int write_combine)
276 {
277 	/*
278 	 * I/O space can be accessed via normal processor loads and stores on
279 	 * this platform but for now we elect not to do this and portable
280 	 * drivers should not do this anyway.
281 	 */
282 	if (mmap_state == pci_mmap_io)
283 		return -EINVAL;
284 
285 	/*
286 	 * Ignore write-combine; for now only return uncached mappings.
287 	 */
288 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
289 
290 	return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
291 			       vma->vm_end - vma->vm_start,
292 			       vma->vm_page_prot);
293 }
294 
295 #ifndef CONFIG_GENERIC_IOMAP
296 
297 void __iomem *__pci_ioport_map(struct pci_dev *dev,
298 			       unsigned long port, unsigned int nr)
299 {
300 	struct pci_channel *chan = dev->sysdata;
301 
302 	if (unlikely(!chan->io_map_base)) {
303 		chan->io_map_base = sh_io_port_base;
304 
305 		if (pci_domains_supported)
306 			panic("To avoid data corruption io_map_base MUST be "
307 			      "set with multiple PCI domains.");
308 	}
309 
310 	return (void __iomem *)(chan->io_map_base + port);
311 }
312 
313 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
314 {
315 	iounmap(addr);
316 }
317 EXPORT_SYMBOL(pci_iounmap);
318 
319 #endif /* CONFIG_GENERIC_IOMAP */
320 
321 EXPORT_SYMBOL(PCIBIOS_MIN_IO);
322 EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
323