1 /* 2 * arch/sh/drivers/pci/pci.c 3 * 4 * Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org> 5 * Copyright (c) 2004 - 2006 Paul Mundt <lethal@linux-sh.org> 6 * 7 * These functions are collected here to reduce duplication of common 8 * code amongst the many platform-specific PCI support code files. 9 * 10 * These routines require the following board-specific routines: 11 * void pcibios_fixup_irqs(); 12 * 13 * See include/asm-sh/pci.h for more information. 14 * 15 * This file is subject to the terms and conditions of the GNU General Public 16 * License. See the file "COPYING" in the main directory of this archive 17 * for more details. 18 */ 19 #include <linux/kernel.h> 20 #include <linux/pci.h> 21 #include <linux/init.h> 22 #include <linux/dma-debug.h> 23 #include <asm/io.h> 24 25 static int __init pcibios_init(void) 26 { 27 struct pci_channel *p; 28 struct pci_bus *bus; 29 int busno; 30 31 /* init channels */ 32 busno = 0; 33 for (p = board_pci_channels; p->init; p++) { 34 if (p->init(p) == 0) 35 p->enabled = 1; 36 else 37 pr_err("Unable to init pci channel %d\n", busno); 38 busno++; 39 } 40 41 #ifdef CONFIG_PCI_AUTO 42 /* assign resources */ 43 busno = 0; 44 for (p = board_pci_channels; p->init; p++) 45 if (p->enabled) 46 busno = pciauto_assign_resources(busno, p) + 1; 47 #endif 48 49 /* scan the buses */ 50 busno = 0; 51 for (p = board_pci_channels; p->init; p++) { 52 if (p->enabled) { 53 bus = pci_scan_bus(busno, p->pci_ops, p); 54 busno = bus->subordinate + 1; 55 } 56 } 57 58 pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq); 59 60 dma_debug_add_bus(&pci_bus_type); 61 62 return 0; 63 } 64 subsys_initcall(pcibios_init); 65 66 /* 67 * Called after each bus is probed, but before its children 68 * are examined. 69 */ 70 void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus) 71 { 72 pci_read_bridge_bases(bus); 73 } 74 75 void pcibios_align_resource(void *data, struct resource *res, 76 resource_size_t size, resource_size_t align) 77 __attribute__ ((weak)); 78 79 /* 80 * We need to avoid collisions with `mirrored' VGA ports 81 * and other strange ISA hardware, so we always want the 82 * addresses to be allocated in the 0x000-0x0ff region 83 * modulo 0x400. 84 */ 85 void pcibios_align_resource(void *data, struct resource *res, 86 resource_size_t size, resource_size_t align) 87 { 88 if (res->flags & IORESOURCE_IO) { 89 resource_size_t start = res->start; 90 91 if (start & 0x300) { 92 start = (start + 0x3ff) & ~0x3ff; 93 res->start = start; 94 } 95 } 96 } 97 98 int pcibios_enable_device(struct pci_dev *dev, int mask) 99 { 100 u16 cmd, old_cmd; 101 int idx; 102 struct resource *r; 103 104 pci_read_config_word(dev, PCI_COMMAND, &cmd); 105 old_cmd = cmd; 106 for(idx=0; idx<6; idx++) { 107 if (!(mask & (1 << idx))) 108 continue; 109 r = &dev->resource[idx]; 110 if (!r->start && r->end) { 111 printk(KERN_ERR "PCI: Device %s not available because " 112 "of resource collisions\n", pci_name(dev)); 113 return -EINVAL; 114 } 115 if (r->flags & IORESOURCE_IO) 116 cmd |= PCI_COMMAND_IO; 117 if (r->flags & IORESOURCE_MEM) 118 cmd |= PCI_COMMAND_MEMORY; 119 } 120 if (dev->resource[PCI_ROM_RESOURCE].start) 121 cmd |= PCI_COMMAND_MEMORY; 122 if (cmd != old_cmd) { 123 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", 124 pci_name(dev), old_cmd, cmd); 125 pci_write_config_word(dev, PCI_COMMAND, cmd); 126 } 127 return 0; 128 } 129 130 /* 131 * If we set up a device for bus mastering, we need to check and set 132 * the latency timer as it may not be properly set. 133 */ 134 static unsigned int pcibios_max_latency = 255; 135 136 void pcibios_set_master(struct pci_dev *dev) 137 { 138 u8 lat; 139 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); 140 if (lat < 16) 141 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; 142 else if (lat > pcibios_max_latency) 143 lat = pcibios_max_latency; 144 else 145 return; 146 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", 147 pci_name(dev), lat); 148 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 149 } 150 151 void __init pcibios_update_irq(struct pci_dev *dev, int irq) 152 { 153 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 154 } 155 156 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 157 { 158 resource_size_t start = pci_resource_start(dev, bar); 159 resource_size_t len = pci_resource_len(dev, bar); 160 unsigned long flags = pci_resource_flags(dev, bar); 161 162 if (unlikely(!len || !start)) 163 return NULL; 164 if (maxlen && len > maxlen) 165 len = maxlen; 166 167 /* 168 * Presently the IORESOURCE_MEM case is a bit special, most 169 * SH7751 style PCI controllers have PCI memory at a fixed 170 * location in the address space where no remapping is desired. 171 * With the IORESOURCE_MEM case more care has to be taken 172 * to inhibit page table mapping for legacy cores, but this is 173 * punted off to __ioremap(). 174 * -- PFM. 175 */ 176 if (flags & IORESOURCE_IO) 177 return ioport_map(start, len); 178 if (flags & IORESOURCE_MEM) 179 return ioremap(start, len); 180 181 return NULL; 182 } 183 EXPORT_SYMBOL(pci_iomap); 184 185 void pci_iounmap(struct pci_dev *dev, void __iomem *addr) 186 { 187 iounmap(addr); 188 } 189 EXPORT_SYMBOL(pci_iounmap); 190 191 EXPORT_SYMBOL(board_pci_channels); 192