1 /* arch/sh/kernel/pci.c 2 * $Id: pci.c,v 1.1 2003/08/24 19:15:45 lethal Exp $ 3 * 4 * Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org> 5 * 6 * 7 * These functions are collected here to reduce duplication of common 8 * code amongst the many platform-specific PCI support code files. 9 * 10 * These routines require the following board-specific routines: 11 * void pcibios_fixup_irqs(); 12 * 13 * See include/asm-sh/pci.h for more information. 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/pci.h> 18 #include <linux/init.h> 19 20 static int __init pcibios_init(void) 21 { 22 struct pci_channel *p; 23 struct pci_bus *bus; 24 int busno; 25 26 #ifdef CONFIG_PCI_AUTO 27 /* assign resources */ 28 busno = 0; 29 for (p = board_pci_channels; p->pci_ops != NULL; p++) { 30 busno = pciauto_assign_resources(busno, p) + 1; 31 } 32 #endif 33 34 /* scan the buses */ 35 busno = 0; 36 for (p= board_pci_channels; p->pci_ops != NULL; p++) { 37 bus = pci_scan_bus(busno, p->pci_ops, p); 38 busno = bus->subordinate+1; 39 } 40 41 /* board-specific fixups */ 42 pcibios_fixup_irqs(); 43 44 return 0; 45 } 46 47 subsys_initcall(pcibios_init); 48 49 void 50 pcibios_update_resource(struct pci_dev *dev, struct resource *root, 51 struct resource *res, int resource) 52 { 53 u32 new, check; 54 int reg; 55 56 new = res->start | (res->flags & PCI_REGION_FLAG_MASK); 57 if (resource < 6) { 58 reg = PCI_BASE_ADDRESS_0 + 4*resource; 59 } else if (resource == PCI_ROM_RESOURCE) { 60 res->flags |= IORESOURCE_ROM_ENABLE; 61 new |= PCI_ROM_ADDRESS_ENABLE; 62 reg = dev->rom_base_reg; 63 } else { 64 /* Somebody might have asked allocation of a non-standard resource */ 65 return; 66 } 67 68 pci_write_config_dword(dev, reg, new); 69 pci_read_config_dword(dev, reg, &check); 70 if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { 71 printk(KERN_ERR "PCI: Error while updating region " 72 "%s/%d (%08x != %08x)\n", pci_name(dev), resource, 73 new, check); 74 } 75 } 76 77 void pcibios_align_resource(void *data, struct resource *res, 78 unsigned long size, unsigned long align) 79 __attribute__ ((weak)); 80 81 /* 82 * We need to avoid collisions with `mirrored' VGA ports 83 * and other strange ISA hardware, so we always want the 84 * addresses to be allocated in the 0x000-0x0ff region 85 * modulo 0x400. 86 */ 87 void pcibios_align_resource(void *data, struct resource *res, 88 unsigned long size, unsigned long align) 89 { 90 if (res->flags & IORESOURCE_IO) { 91 unsigned long start = res->start; 92 93 if (start & 0x300) { 94 start = (start + 0x3ff) & ~0x3ff; 95 res->start = start; 96 } 97 } 98 } 99 100 int pcibios_enable_device(struct pci_dev *dev, int mask) 101 { 102 u16 cmd, old_cmd; 103 int idx; 104 struct resource *r; 105 106 pci_read_config_word(dev, PCI_COMMAND, &cmd); 107 old_cmd = cmd; 108 for(idx=0; idx<6; idx++) { 109 if (!(mask & (1 << idx))) 110 continue; 111 r = &dev->resource[idx]; 112 if (!r->start && r->end) { 113 printk(KERN_ERR "PCI: Device %s not available because " 114 "of resource collisions\n", pci_name(dev)); 115 return -EINVAL; 116 } 117 if (r->flags & IORESOURCE_IO) 118 cmd |= PCI_COMMAND_IO; 119 if (r->flags & IORESOURCE_MEM) 120 cmd |= PCI_COMMAND_MEMORY; 121 } 122 if (dev->resource[PCI_ROM_RESOURCE].start) 123 cmd |= PCI_COMMAND_MEMORY; 124 if (cmd != old_cmd) { 125 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", 126 pci_name(dev), old_cmd, cmd); 127 pci_write_config_word(dev, PCI_COMMAND, cmd); 128 } 129 return 0; 130 } 131 132 /* 133 * If we set up a device for bus mastering, we need to check and set 134 * the latency timer as it may not be properly set. 135 */ 136 unsigned int pcibios_max_latency = 255; 137 138 void pcibios_set_master(struct pci_dev *dev) 139 { 140 u8 lat; 141 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); 142 if (lat < 16) 143 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; 144 else if (lat > pcibios_max_latency) 145 lat = pcibios_max_latency; 146 else 147 return; 148 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); 149 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 150 } 151 152 void __init pcibios_update_irq(struct pci_dev *dev, int irq) 153 { 154 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 155 } 156