1 /* 2 * arch/sh/drivers/pci/fixups-sdk7780.c 3 * 4 * PCI fixups for the SDK7780SE03 5 * 6 * Copyright (C) 2003 Lineo uSolutions, Inc. 7 * Copyright (C) 2004 - 2006 Paul Mundt 8 * 9 * This file is subject to the terms and conditions of the GNU General Public 10 * License. See the file "COPYING" in the main directory of this archive 11 * for more details. 12 */ 13 #include <linux/pci.h> 14 #include "pci-sh4.h" 15 #include <asm/io.h> 16 17 int pci_fixup_pcic(struct pci_channel *chan) 18 { 19 /* Enable all interrupts, so we know what to fix */ 20 pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR); 21 pci_write_reg(chan, 0x0000380F, SH7780_PCIAINTM); 22 23 /* Set up standard PCI config registers */ 24 pci_write_reg(chan, 0xFB00, SH7780_PCISTATUS); 25 pci_write_reg(chan, 0x0047, SH7780_PCICMD); 26 pci_write_reg(chan, 0x00, SH7780_PCIPIF); 27 pci_write_reg(chan, 0x1912, SH7780_PCISVID); 28 pci_write_reg(chan, 0x0001, SH7780_PCISID); 29 30 pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0); /* PCI */ 31 pci_write_reg(chan, 0x08000000, SH7780_PCILAR0); /* SHwy */ 32 pci_write_reg(chan, 0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */ 33 34 pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1); 35 pci_write_reg(chan, 0x00000000, SH7780_PCILAR1); 36 pci_write_reg(chan, 0x00000000, SH7780_PCILSR1); 37 38 pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR); 39 40 /* 41 * Set the MBR so PCI address is one-to-one with window, 42 * meaning all calls go straight through... use ifdef to 43 * catch erroneous assumption. 44 */ 45 pci_write_reg(chan, 0xFD000000 , SH7780_PCIMBR0); 46 pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */ 47 48 /* Set IOBR for window containing area specified in pci.h */ 49 pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1), 50 SH7780_PCIIOBR); 51 pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18), 52 SH7780_PCIIOBMR); 53 54 pci_write_reg(chan, 0xA5000C01, SH7780_PCICR); 55 56 return 0; 57 } 58